ac97.h

WM9715 driver for S3C2440.

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
// -----------------------------------------------------------------------------
//
//      THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
//      ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
//      THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
//      PARTICULAR PURPOSE.
//  
// -----------------------------------------------------------------------------

//
// ac97.h 
// 
// definitions for the AC97 Controller and AC97 codec - Sigmatel's STAC9766
//

#ifndef _AC97_H_
#define _AC97_H_

// For audio controller
// 
#define AC97_INTERNAL_CLOCK_ENABLE		(1<<20)					// Enable CPU clock to AC97 controller

#define AC97_PCMDATA_FIFO_LENGTH	(16)

// AC97 Global Control register
//
#define 	AC97_CODEC_READY_ENABLE			(1<<22)
#define 	AC97_PCM_OUT_UNDERRUN_ENABLE	(1<<21)
#define 	AC97_PCM_IN_OVERRUN_ENABLE		(1<<20)
#define 	AC97_MIC_IN_OVERRUN_ENABLE		(1<<19)
#define 	AC97_PCM_IN_THRESHOLD_ENABLE	(1<<18)
#define 	AC97_PCM_OUT_THRESHOLD_ENABLE	(1<<17)
#define 	AC97_MIC_IN_THRESHOLD_ENABLE	(1<<16)

#define 	AC97_PCM_OUT_DMA_MODE			(2<<12)
#define 	AC97_PCM_OUT_PIO_MODE			(1<<12)
#define 	AC97_PCM_IN_DMA_MODE			(2<<10)
#define 	AC97_PCM_IN_PIO_MODE			(1<<10)
#define 	AC97_MIC_IN_DMA_MODE			(1<<9)
#define 	AC97_MIC_IN_PIO_MODE			(1<<8)

#define 	AC97_ACLINK_ENABLE			(1<<3)
#define 	AC97_ACLINK_ON				(1<<2)

#define 	AC97_WARM_RESET				(1<<1)
#define 	AC97_COLD_RESET				(1<<0)

// AC97 Codec Command and Status Register
//
#define		AC97_READ_COMMAND			(1<<23)
#define		AC97_CMD_ADDR_SHIFT			(16)
#define		AC97_CMD_DATA_SHIFT			(0)
#define		AC97_STAT_DATA_READ_MASK			(0xFFFF << 0)
#define		AC97_STAT_ADDR_READ_MASK			(0x7F << 16)

// Defines for audio controller end here

// ---------------------------------------------------------
// Added by Diao Liangpeng 2009-04-15
// Defines for WM9715L registers

#define AC97_RESET                   	    0x00
#define AC97_MASTER_VOLUME           	    0x02
#define AC97_ALT_LINE_LEVEL_OUT_VOLUME      0x04
#define AC97_MASTER_VOLUME_MONO      	    0x06
#define AC97_PC_BEEP_VOLUME          	    0x0a
#define AC97_PHONE_VOLUME            	    0x0c
#define AC97_MIC_VOLUME              	    0x0e
#define AC97_LINE_IN_VOLUME          	    0x10
#define AC97_CD_VOLUME               	    0x12
#define AC97_VIDEO_VOLUME            	    0x14
#define AC97_AUX_VOLUME              	    0x16
#define AC97_PCM_OUT_VOLUME          	    0x18
#define AC97_RECORD_SELECT           	    0x1a
#define AC97_RECORD_GAIN             	    0x1c
#define AC97_GENERAL_PURPOSE         	    0x20
#define AC97_THREE_D_CONTROL         	    0x22
#define AC97_POWER_CONTROL           	    0x26
#define AC97_EXT_POWER_CONTROL				0x24
#define AC97_EXTENDED_AUDIO_ID           	0x28
#define AC97_EXTENDED_AUDIO_STATUS_CONTROL  0x2a
#define AC97_PCM_FRONT_DAC_RATE	            0x2c
#define AC97_PCM_ADC_RATE		            0x32
#define AC97_SERIAL_CONFIGURATION    	    0x74
#define AC97_MISC_CONTROL            	    0x76
#define AC97_SAMPLE_RATE_0           	    0x78
#define AC97_SAMPLE_RATE_1           	    0x7a
#define AC97_VENDOR_ID1              	    0x7c
#define AC97_VENDOR_ID2              	    0x7e

// control
#define		AC97_PWR_PR0            0x0100      // ADC and Mux powerdown
#define		AC97_PWR_PR1            0x0200      // DAC powerdown
#define		AC97_PWR_PR2            0x0400      // Analog Mixer Powerdown (Vref on)
#define		AC97_PWR_PR3            0x0800      // Output Mixer Powerdown (Vref off)
#define		AC97_PWR_PR4            0x1000      // AC-link Powerdown
#define		AC97_PWR_PR5            0x2000      // Internal Clk Disable
#define		AC97_PWR_PR6            0x4000      // Aux Out Powerdown

/// ---------------------------------------------------------

#endif // _AC97_H_

#ifndef __S3C2440A_AC97_H
#define __S3C2440A_AC97_H

#if __cplusplus
    extern "C" 
    {
#endif

//------------------------------------------------------------------------------
//  Type: S3C2440A_AC97_REG    
//
//  AC97 control registers. This register bank is located by the constant
//  CPU_BASE_REG_XX_AC97 in the configuration file cpu_base_reg_cfg.h.
//

typedef struct {
	unsigned int AC_GLBCTRL;		// 0x00
	unsigned int AC_GLBSTAT;		// 0x04
	unsigned int AC_CODEC_CMD;		// 0x08
	unsigned int AC_CODEC_STAT;		// 0x0c
	unsigned int AC_PCMADDR;		// 0x10
	unsigned int AC_MICADDR;		// 0x14
	unsigned int AC_PCMDATA;		// 0x18
	unsigned int AC_MICDATA;		// 0x1c

} S3C2440A_AC97_REG, *PS3C2440A_AC97_REG;

#define S3C2440A_BASE_REG_PA_AC97       (0x5B000000)           
#define AC_PCMDATA_PHYS					(0x5B000018)	// For PCM In and Out - Stereo
#define AC_MICDATA_PHYS					(0x5B00001C)	// For MIC In - Mono


#if __cplusplus
    }
#endif

#endif // __S3C2440A_AC97_H