zlg_avalon_rtl8019_regs.h

周立功 SOPC嵌入式系统实验教程 网卡芯片驱动及其应用

/****************************************Copyright (c)**************************************************
**                               Guangzhou ZHIYUAN ELECTRONIC CO.,LTD.
**                                      Research centre
**                         http://www.zyinside.com, http://www.zlgmcu.com
**
**---------------------------------------File Info-----------------------------------------------------
** File name:			zlg_avalon_rtl8019_regs.h
** Latest modified Date:  2005-12-07
** Latest Version:		    1.0
** Descriptions:		Register definitions for the 8019as ethernet chip used on the NiosII 
**                  SOPC board made by ZLG-MCU Development Co.,LTD
**
**------------------------------------------------------------------------------------------------------
** Created by:			Jing.Zhang
** Created date:		2005-12-07
** Version:				  1.0
** Descriptions:		The original version
**
**------------------------------------------------------------------------------------------------------
** Modified by:
** Modified date:
** Version:
** Descriptions:
**
********************************************************************************************************/

#ifndef __ZLG_AVALON_RTL8019_REGS_H__
#define __ZLG_AVALON_RTL8019_REGS_H__
#include <io.h>

#define ZLG_8019AS_CHIP_ID                   (0x7050)
#define ZLG_8019AS_CHIP_ID0                  (0x50)
#define ZLG_8019AS_CHIP_ID1                  (0x70)
/* Those two registers contain the 8019as chip ID in page 0  */
#define ZLG_8019AS_CHIP_ID0_OFFSET           (0x0a)
#define ZLG_8019AS_CHIP_ID1_OFFSET           (0x0b)

/*
* There are four banks of registers, each paged in or out depending upon the
* value written to the Command Register
*/

/* Command register   */
#define ZLG_8019AS_CR_OFFSET           0x00
#define ZLG_8019AS_CR_RR_MSK          (1<<3)  //Remote Read
#define ZLG_8019AS_CR_RW_MSK          (1<<4)  //Remote Write
#define ZLG_8019AS_CR_SP_MSK          (3<<3)  //Send Packet
#define ZLG_8019AS_CR_TXP_MSK         (1<<2)  //Transmit Packet
#define ZLG_8019AS_CR_STA_MSK         (1<<1)  //START
#define ZLG_8019AS_CR_STO_MSK         (1<<0)  //STOP

/* Interrupt Status register,Offset 07H,Write/Read in page0  */
#define ZLG_8019AS_ISR_OFFSET          0x07
#define ZLG_8019AS_ISR_RST_MSK        (1<<7)  //
#define ZLG_8019AS_ISR_RDC_MSK        (1<<6)  //DMA complete
#define ZLG_8019AS_ISR_CNT_MSK        (1<<5)  //one or more errors occur
#define ZLG_8019AS_ISR_OVW_MSK        (1<<4)  //Receiver buffer is exhausted
#define ZLG_8019AS_ISR_TXE_MSK        (1<<3)  //Transmit error
#define ZLG_8019AS_ISR_RXE_MSK        (1<<2)  //Receive error
#define ZLG_8019AS_ISR_PTX_MSK        (1<<1)  //packet transmitted ok 
#define ZLG_8019AS_ISR_PRX_MSK        (1<<0)  //packet receive ok

/* Interrupt Mask register,Offset 0FH,Write in page0      */
/* All bits correspond to the bits in the ISR register.   */
/* IMR is cleared when power up. Setting individual bits  */
/* will enable the corresponding interrupts               */
#define ZLG_8019AS_IMR_OFFSET          0x0f
#define ZLG_8019AS_IMR_RST_MSK        (1<<7)  //
#define ZLG_8019AS_IMR_RDC_MSK        (1<<6)  //DMA complete
#define ZLG_8019AS_IMR_CNT_MSK        (1<<5)  //one or more errors occur
#define ZLG_8019AS_IMR_OVW_MSK        (1<<4)  //Receiver buffer is exhausted
#define ZLG_8019AS_IMR_TXE_MSK        (1<<3)  //Transmit error
#define ZLG_8019AS_IMR_RXE_MSK        (1<<2)  //Receive error
#define ZLG_8019AS_IMR_PTX_MSK        (1<<1)  //packet transmitted ok 
#define ZLG_8019AS_IMR_PRX_MSK        (1<<0)  //packet receive ok

/* Data configuration register,Offset 0EH,Write in page0 Read in page2*/
#define ZLG_8019AS_DCR_OFFSET          0x0E
#define ZLG_8019AS_DCR_FT1_MSK        (1<<6)  //FIFO threshold select bit 1
#define ZLG_8019AS_DCR_FT0_MSK        (1<<5)  //FIFO threshold select bit 0
#define ZLG_8019AS_DCR_ARM_MSK        (1<<4)  //Auto-initialize 
#define ZLG_8019AS_DCR_LS_MSK         (1<<3)  //Loopback select
#define ZLG_8019AS_DCR_LAS_MSK        (1<<2)  //Must be zero
#define ZLG_8019AS_DCR_BOS_MSK        (1<<1)  //Byte order select 
#define ZLG_8019AS_DCR_WTS_MSK        (1<<0)  //Word Transfer Select

/* Transmit configuration register,Offset 0DH,Write in page0 Read in page2*/
#define ZLG_8019AS_TCR_OFFSET          0x0D

/* Transmit Status register,Offset 04H,Read in page0                      */
#define ZLG_8019AS_TSR_OFFSET          0x04
#define ZLG_8019AS_TSR_OWC_MSK         (1<<7) //out of window collision
#define ZLG_8019AS_TSR_CDH_MSK         (1<<6) //CD Heartbeat
#define ZLG_8019AS_TSR_CRS_MSK         (1<<4) //Carrier Sense Lost
#define ZLG_8019AS_TSR_ABT_MSK         (1<<3) //transmission aborted
#define ZLG_8019AS_TSR_COL_MSK         (1<<2) //Collied with other station
#define ZLG_8019AS_TSR_PTX_MSK         (1<<0) //transmission complete

/* Receive configuration register,Offset 0CH,Write in page0 Read in page2*/
#define ZLG_8019AS_RCR_OFFSET          0x0C

/* Receive Status register,Offset 0CH,Read in page0                      */
#define ZLG_8019AS_RSR_OFFSET          0x0C
#define ZLG_8019AS_RSR_PRX_MSK         (1<<0) //Receive complete

/* RTL8019as defined registers in page 3   */
/* Configuration register0,Offset 03H,Read in page3                      */
#define ZLG_8019AS_CONFIG0_OFFSET      0x03
/* Configuration register1,Offset 04H,Read in page3                      */
#define ZLG_8019AS_CONFIG1_OFFSET      0x04
#define ZLG_8019AS_CONFIG1_IEN_OFFSET  (1<<7) //IRQ Enable.
/* Configuration register2,Offset 05H,Read in page3                      */
#define ZLG_8019AS_CONFIG2_OFFSET      0x05
/* Configuration register3,Offset 06H,Read in page3                      */
#define ZLG_8019AS_CONFIG3_OFFSET      0x06
/* Configuration register4,Offset 0DH,Read in page3                      */
#define ZLG_8019AS_CONFIG4_OFFSET      0x0D
/* Test register,Offset 07H,Read/Write in page3                      */
#define ZLG_8019AS_TEST_OFFSET         0x07
/* Page start register, Offset 01H, Write in page0,Read in page2 */
#define ZLG_8019AS_PSTART_OFFSET       0x01
/* Page stop register, Offset 02H, Write in page0,Read in page2  */
#define ZLG_8019AS_PSTOP_OFFSET        0x02
/* Boundary register, Offset 03H, Write in page0,Read in page0   */
#define ZLG_8019AS_BNRY_OFFSET         0x03
/* Transmit page start register, Offset 04H, Write in page0      */
#define ZLG_8019AS_TPSR_OFFSET         0x04
/* Transmit Byte count register0, Offset 05H, Write in page0     */
#define ZLG_8019AS_TBCR0_OFFSET        0x05
/* Transmit Byte count register1, Offset 06H, Write in page0     */
#define ZLG_8019AS_TBCR1_OFFSET        0x06
/* Number of Collision register, Offset 05H, Read in page0       */
#define ZLG_8019AS_NCR_OFFSET          0x05
/* First in first out register, Offset 06H, Read in page0        */
#define ZLG_8019AS_FIFO_OFFSET         0x06
/* Current remote DMA address register, Offset 08H, Read in page0*/
#define ZLG_8019AS_CRDA0_OFFSET        0x08
/* Current remote DMA address register, Offset 09H, Read in page0*/
#define ZLG_8019AS_CRDA1_OFFSET        0x09
/* Remote Start Address register0, Offset 08H, Write in page0    */
#define ZLG_8019AS_RSAR0_OFFSET        0x08
/* Remote Start Address register1, Offset 09H, Write in page0    */
#define ZLG_8019AS_RSAR1_OFFSET        0x09
/* Remote Byte count register0, Offset 0AH, Write in page0       */
#define ZLG_8019AS_RBCR0_OFFSET        0x0A
/* Remote Byte count register1, Offset 0BH, Write in page0       */
#define ZLG_8019AS_RBCR1_OFFSET        0x0B
/* Frame alignment Error Tally Counter register, Offset 0DH,     */
#define ZLG_8019AS_CNTR0_OFFSET        0x0D
/* CRC Error Tally Counter register, Offset 0EH, Read in page0   */
#define ZLG_8019AS_CNTR1_OFFSET        0x0E
/* Missed Packet Tally Counter register, Offset 0FH,Read in page0*/
#define ZLG_8019AS_CNTR2_OFFSET        0x0F
/* Physical address register, Offset 01H,Write/Read in page1     */
#define ZLG_8019AS_PAR_OFFSET          0x01
#define ZLG_8019AS_PAR0_OFFSET         0x01
#define ZLG_8019AS_PAR1_OFFSET         0x02
#define ZLG_8019AS_PAR2_OFFSET         0x03
#define ZLG_8019AS_PAR3_OFFSET         0x04
#define ZLG_8019AS_PAR4_OFFSET         0x05
#define ZLG_8019AS_PAR5_OFFSET         0x06
/* Current page register, Offset 07H,Write/Read in page1         */
#define ZLG_8019AS_CURR_OFFSET         0x07
/* Multicast address register, Offset 08H,Write/Read in page1     */
#define ZLG_8019AS_MAR_OFFSET          0x08