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📄 ppm_de.txt

📁 ppm是通信类系统比较重要的前段部件
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library ieee;
	use ieee.std_logic_1164.all;
	use ieee.std_logic_unsigned.all;

entity ppm_d is
	port(clk,rst,din:in std_logic;
	d_en,f_en:out std_logic;
	dout:out std_logic_vector(7 downto 0));
end;	

architecture rtl of ppm_d is
	type state is ( s0,s2,s1,s3,s4,s5);
	signal next_state :state;
	signal now_state :state;	
	signal clk0:std_logic;
	signal q:integer range 0 to 7;
	signal counter,counter_1:std_logic_vector(2 downto 0);
	signal reg,temp:std_logic_vector(7 downto 0);





begin


	process(clk,rst)

	begin

		if rst='1' 	then

			counter<="000";
			clk0<='0';

		elsif clk'event and clk='1'	then
			

			if counter/="111"	then

				counter<=counter+1;

			else

				counter<="000";
				clk0<=not clk0;

			end if;

		end if;

	end process;


	process(din,clk0,temp,rst,now_state)

	begin

		if rst='1'	then

			reg<="00000000";
			d_en<='0';f_en<='0';
			next_state<=s0;

		elsif clk0'event and clk0='1'	then
			now_state<=next_state;

			reg<=reg(6 downto 0)&din;
			f_en<='0';d_en<='0';


			case now_state is

				when s0 =>

					if reg="01111011"	then

						next_state<=s1;
						q<=0;counter_1<="000";

					end if;

				when s1 =>

					if counter_1="011"		then
						if reg(3 downto 0)="1101"	then

							next_state<=s0;
							f_en<='1';
							dout<=temp;
						end if;
					elsif counter_1="111"		then

						if reg="10111111"	then

							next_state<=s2;

						elsif reg="11101111"	then

							next_state<=s3;

						elsif reg="11111011"	then

							next_state<=s4;

						elsif reg="11111110"	then

							next_state<=s5;

						end if;					

						counter_1<="000";
						d_en<='1';

					else

						counter_1<=counter_1+"001";

					end if;

				when s2 => 
					next_state<= s1;q<=q+2;

					temp(q)<='0';temp(q+1)<='0';

				when s3 =>

					next_state<= s1;q<=q+2;
					temp(q)<='1';temp(q+1)<='0';

				when s4 => 
					next_state<= s1;q<=q+2;

					temp(q)<='0';temp(q+1)<='1';

				when s5 =>
					next_state<= s1;q<=q+2;				
					temp(q)<='1';temp(q+1)<='1';

				when others => next_state<=s0;

			end case;

		end if;

	end process;

end;

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