shfrt.fit.eqn

改程序的设计的是带有并行置位的移位寄存器

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--REG8[0] is REG8[0] at LC_X12_Y30_N3
--operation mode is normal

REG8[0]_lut_out = LOAD & (DIN[0]) # !LOAD & REG8[1];
REG8[0] = DFFEAS(REG8[0]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[1] is REG8[1] at LC_X12_Y30_N6
--operation mode is normal

REG8[1]_lut_out = LOAD & DIN[1] # !LOAD & (REG8[2]);
REG8[1] = DFFEAS(REG8[1]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[2] is REG8[2] at LC_X12_Y30_N9
--operation mode is normal

REG8[2]_lut_out = LOAD & DIN[2] # !LOAD & (REG8[3]);
REG8[2] = DFFEAS(REG8[2]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[3] is REG8[3] at LC_X12_Y30_N2
--operation mode is normal

REG8[3]_lut_out = LOAD & DIN[3] # !LOAD & (REG8[4]);
REG8[3] = DFFEAS(REG8[3]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[4] is REG8[4] at LC_X12_Y30_N4
--operation mode is normal

REG8[4]_lut_out = LOAD & (DIN[4]) # !LOAD & REG8[5];
REG8[4] = DFFEAS(REG8[4]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[5] is REG8[5] at LC_X12_Y30_N5
--operation mode is normal

REG8[5]_lut_out = LOAD & (DIN[5]) # !LOAD & REG8[6];
REG8[5] = DFFEAS(REG8[5]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[6] is REG8[6] at LC_X12_Y30_N7
--operation mode is normal

REG8[6]_lut_out = LOAD & DIN[6] # !LOAD & (REG8[7]);
REG8[6] = DFFEAS(REG8[6]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--REG8[7] is REG8[7] at LC_X12_Y30_N8
--operation mode is normal

REG8[7]_lut_out = LOAD & DIN[7] # !LOAD & (REG8[7]);
REG8[7] = DFFEAS(REG8[7]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--DIN[0] is DIN[0] at PIN_K16
--operation mode is input

DIN[0] = INPUT();


--LOAD is LOAD at PIN_F15
--operation mode is input

LOAD = INPUT();


--CLK is CLK at PIN_L2
--operation mode is input

CLK = INPUT();


--DIN[1] is DIN[1] at PIN_D15
--operation mode is input

DIN[1] = INPUT();


--DIN[2] is DIN[2] at PIN_E15
--operation mode is input

DIN[2] = INPUT();


--DIN[3] is DIN[3] at PIN_E20
--operation mode is input

DIN[3] = INPUT();


--DIN[4] is DIN[4] at PIN_J16
--operation mode is input

DIN[4] = INPUT();


--DIN[5] is DIN[5] at PIN_G16
--operation mode is input

DIN[5] = INPUT();


--DIN[6] is DIN[6] at PIN_B15
--operation mode is input

DIN[6] = INPUT();


--DIN[7] is DIN[7] at PIN_C16
--operation mode is input

DIN[7] = INPUT();


--QB is QB at PIN_R15
--operation mode is output

QB = OUTPUT(REG8[0]);