spi.lst

avr atmega168v spi的程序

__text_start:
__start:
      34 EFCF      LDI	R28,0xFF
      35 E0D4      LDI	R29,4
      36 BFCD      OUT	0x3D,R28
      37 BFDE      OUT	0x3E,R29
      38 51C0      SUBI	R28,0x10
      39 40D0      SBCI	R29,0
      3A EA0A      LDI	R16,0xAA
      3B 8308      STD	Y+0,R16
      3C 2400      CLR	R0
      3D E0E0      LDI	R30,0
      3E E0F1      LDI	R31,1
      3F E011      LDI	R17,1
      40 30E0      CPI	R30,0
      41 07F1      CPC	R31,R17
      42 F011      BEQ	0x0045
      43 9201      ST	R0,Z+
      44 CFFB      RJMP	0x0040
      45 8300      STD	Z+0,R16
      46 E6E8      LDI	R30,0x68
      47 E0F0      LDI	R31,0
      48 E0A0      LDI	R26,0
      49 E0B1      LDI	R27,1
      4A E010      LDI	R17,0
      4B 36E8      CPI	R30,0x68
      4C 07F1      CPC	R31,R17
      4D F021      BEQ	0x0052
      4E 95C8      LPM
      4F 9631      ADIW	R30,1
      50 920D      ST	R0,X+
      51 CFF9      RJMP	0x004B
      52 940E 00AA CALL	_main
_exit:
      54 CFFF      RJMP	_exit
FILE: G:\燕洪成\gra_des\exper\inc\myfun.h
(0001) //******DelayTime*******//	 
(0002) void Delayus(int time)
(0003) {     
(0004)  do
(0005)       time--;
_Delayus:
  time                 --> R16
      55 5001      SUBI	R16,1
      56 4010      SBCI	R17,0
(0006)  while(time>1);
      57 E081      LDI	R24,1
      58 E090      LDI	R25,0
      59 1780      CP	R24,R16
      5A 0791      CPC	R25,R17
      5B F3CC      BLT	0x0055
      5C 9508      RET
_Delayms:
  time                 --> R20
      5D 934A      ST	R20,-Y
      5E 935A      ST	R21,-Y
      5F 01A8      MOVW	R20,R16
(0007) }	  
(0008) void Delayms(unsigned int time)
(0009) {
      60 C005      RJMP	0x0066
(0010)  while(time!=0)
(0011) 	  {		
(0012) 	   Delayus(1000);
      61 EE08      LDI	R16,0xE8
      62 E013      LDI	R17,3
      63 DFF1      RCALL	_Delayus
(0013) 	   time--;
      64 5041      SUBI	R20,1
      65 4050      SBCI	R21,0
      66 3040      CPI	R20,0
      67 0745      CPC	R20,R21
      68 F7C1      BNE	0x0061
      69 9159      LD	R21,Y+
      6A 9149      LD	R20,Y+
      6B 9508      RET
FILE: G:\燕洪成\gra_des\exper\spi\spi_master\spi.c
(0001) // **************************************************************
(0002) // ***         实验：        SPI Interface  Master            ***
(0003) // ***                       2007年10月13日                   ***
(0004) // ***         目标MCU:MEGA168v     晶振：内部  8MHZ          ***
(0005) // **************************************************************
(0006) //set_bit:PORTD |=(1<<PORTD3);
(0007) //clr_bit:PORTD &=~(1<<PORTD3);
(0008) #include<iom168v.h>
(0009) #include<macros.h>
(0010) #include<myfun.h>
(0011) 
(0012) //*************************************************
(0013) //******************  USART  **********************
(0014) //*************************************************
(0015) #define USART_DDR DDRD
(0016) #define DDR_TX DDD1
(0017) #define USART_PORT PORTD
(0018) #define USART_RX PORTD0
(0019) //***********串口初始化******************************* 
(0020) //内部8Mhz频率，设置波特率9.6k，8位数据位，
(0021) //无校验,1位停止位
(0022) void USART_Init(void) 
(0023) {  
(0024)   USART_DDR |=(1<<DDR_TX);   //set TX output
_USART_Init:
      6C 9A51      SBI	0x0A,1
(0025)   USART_PORT |=(1<<USART_RX);  //RX pull up 
      6D 9A58      SBI	0x0B,0
(0026)    
(0027)   UCSR0B = 0x00; //设置波特率之前先关闭串口
      6E 2422      CLR	R2
      6F 9220 00C1 STS	0x00C1,R2
(0028)   UCSR0A = 0x00;
      71 9220 00C0 STS	0x00C0,R2
(0029)   UBRR0H=0;
      73 9220 00C5 STS	0x00C5,R2
(0030)   UBRR0L=51;
      75 E383      LDI	R24,0x33
      76 9380 00C4 STS	0x00C4,R24
(0031)   //UCSR0B=(1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);//enable
(0032)   UCSR0B=(1<<RXEN0)|(1<<TXEN0);
      78 E188      LDI	R24,0x18
      79 9380 00C1 STS	0x00C1,R24
(0033)   UCSR0C=(1<<UCSZ00)|(1<<UCSZ01);//8 data,1 stop 
      7B E086      LDI	R24,6
      7C 9380 00C2 STS	0x00C2,R24
      7E 9508      RET
(0034) }
(0035)  
(0036) //***************串口发送数据函数***************************
(0037) void USART_Transmit(unsigned char data)  //查询方式发送接收字符函数 
(0038)  { 
(0039)   while( !(UCSR0A & (1<<UDRE0)))     //等待发送缓冲区为空
_USART_Transmit:
  data                 --> R16
      7F 9020 00C0 LDS	R2,0x00C0
      81 FE25      SBRS	R2,5
      82 CFFC      RJMP	_USART_Transmit
(0040)         ;                   
(0041)   UDR0 = data;
      83 9300 00C6 STS	0x00C6,R16
      85 9508      RET
(0042)  }   
(0043) //*************************************************
(0044) //**************** USART_over *********************
(0045) //*************************************************
(0046) //*************************************************//
(0047) //******************  SPI  ************************//
(0048) //*************************************************//
(0049) #define DDR_SPI DDRB
(0050) #define DDR_SS DDB2
(0051) #define DDR_MOSI DDB3
(0052) #define DDR_MISO DDB4
(0053) #define DDR_SCK DDB5
(0054) #define SPI_PORT PORTB
(0055) #define SPI_SS PORTB2
(0056) //**SPI_MasterInit()**//
(0057) void SPI_MasterInit(void)
(0058) {
(0059)  DDR_SPI = (1<<DDR_SS)|(1<<DDR_MOSI)|(1<<DDR_SCK);//Port initialize 
_SPI_MasterInit:
      86 E28C      LDI	R24,0x2C
      87 B984      OUT	0x04,R24
(0060)  SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);//enable SPI,Master,fosc/16
      88 E581      LDI	R24,0x51
      89 BD8C      OUT	0x2C,R24
      8A 9508      RET
(0061) }
(0062) //**SPI_MasterTransmit()**//
(0063) void SPI_MasterTransmit(unsigned char cData)
(0064) {
(0065)  SPI_PORT &=~(1<<SPI_SS);
_SPI_MasterTransmit:
  cData                --> R16
      8B 982A      CBI	0x05,2
(0066)  SPDR = cData;//启动数据传输
      8C BD0E      OUT	0x2E,R16
(0067)  while(!(SPSR & (1<<SPIF)))//等待传输结束
      8D B42D      IN	R2,0x2D
      8E FE27      SBRS	R2,7
      8F CFFD      RJMP	0x008D
(0068)       ;
(0069)  SPI_PORT |=(1<<SPI_SS);
      90 9A2A      SBI	0x05,2
      91 9508      RET
(0070) }
(0071) //**SPI_MasterReceive()**//
(0072) unsigned char SPI_MasterReceive(void)
(0073) {
(0074)  SPI_MasterTransmit(0x00);
_SPI_MasterReceive:
      92 2700      CLR	R16
      93 DFF7      RCALL	_SPI_MasterTransmit
(0075)  return SPDR;
      94 B50E      IN	R16,0x2E
      95 9508      RET
(0076) }
(0077) //**********中断服务程序*********************
(0078) /*#pragma interrupt_handler SPI_ovf_isr:18
(0079) void SPI_ovf_isr(void)
(0080) {
(0081)  unsigned char temp_data;
(0082)  temp_data=SPDR;
(0083)  USART_Transmit(temp_data);
(0084) }*/
(0085) //*************************************************//
(0086) //******************  SPI_over  *******************//
(0087) //*************************************************//
(0088) 
(0089) //*************************************************
(0090) //******************   INT   **********************
(0091) //*************************************************
(0092) //**INT_Init()**//
(0093) void INT_Init()
(0094) {
(0095)  DDRD &= ~(1<<DDD2);//clr,input
_INT_Init:
      96 9852      CBI	0x0A,2
(0096)  EICRA |= (1<<ISC01);//h2l trig
      97 9180 0069 LDS	R24,0x0069
      99 6082      ORI	R24,2
      9A 9380 0069 STS	0x0069,R24
(0097)  EIMSK |= (1<<INT0);//set INT0 open
      9C 9AE8      SBI	0x1D,0
      9D 9508      RET
_INT0_ovf_isr:
  temp_data            --> R10
      9E 940E 00B1 CALL	push_lset
      A0 92AA      ST	R10,-Y
      A1 92BA      ST	R11,-Y
(0098) }
(0099) #pragma interrupt_handler INT0_ovf_isr:2  
(0100) void INT0_ovf_isr(void)
(0101) {
(0102)    unsigned char temp_data;
(0103)    temp_data=SPI_MasterReceive();
      A2 DFEF      RCALL	_SPI_MasterReceive
      A3 2EA0      MOV	R10,R16
(0104)    USART_Transmit(temp_data);  
      A4 DFDA      RCALL	_USART_Transmit
      A5 90B9      LD	R11,Y+
      A6 90A9      LD	R10,Y+
      A7 940E 00C8 CALL	pop_lset
      A9 9518      RETI
(0105) }
(0106) //*************************************************
(0107) //****************** INT_over *********************
(0108) //*************************************************
(0109) 
(0110) void main(void)
(0111) {
(0112)  CLI();
_main:
      AA 94F8      BCLR	7
(0113)  INT_Init();
      AB DFEA      RCALL	_INT_Init
(0114)  USART_Init();
      AC DFBF      RCALL	_USART_Init
(0115)  SPI_MasterInit();
      AD DFD8      RCALL	_SPI_MasterInit
(0116)  SEI();
      AE 9478      BSET	7
(0117)  
(0118)  while(1)
FILE: <library>
      AF CFFF      RJMP	0x00AF
      B0 9508      RET
push_lset:
      B1 93FA      ST	R31,-Y
      B2 93EA      ST	R30,-Y
      B3 93BA      ST	R27,-Y
      B4 93AA      ST	R26,-Y
      B5 939A      ST	R25,-Y
      B6 938A      ST	R24,-Y
      B7 933A      ST	R19,-Y
      B8 932A      ST	R18,-Y
      B9 931A      ST	R17,-Y
      BA 930A      ST	R16,-Y
      BB 929A      ST	R9,-Y
      BC 928A      ST	R8,-Y
      BD 927A      ST	R7,-Y
      BE 926A      ST	R6,-Y
      BF 925A      ST	R5,-Y
      C0 924A      ST	R4,-Y
      C1 923A      ST	R3,-Y
      C2 922A      ST	R2,-Y
      C3 921A      ST	R1,-Y
      C4 920A      ST	R0,-Y
      C5 B60F      IN	R0,0x3F
      C6 920A      ST	R0,-Y
      C7 9508      RET
pop_lset:
      C8 9009      LD	R0,Y+
      C9 BE0F      OUT	0x3F,R0
      CA 9009      LD	R0,Y+
      CB 9019      LD	R1,Y+
      CC 9029      LD	R2,Y+
      CD 9039      LD	R3,Y+
      CE 9049      LD	R4,Y+
      CF 9059      LD	R5,Y+
      D0 9069      LD	R6,Y+
      D1 9079      LD	R7,Y+
      D2 9089      LD	R8,Y+
      D3 9099      LD	R9,Y+
      D4 9109      LD	R16,Y+
      D5 9119      LD	R17,Y+
      D6 9129      LD	R18,Y+
      D7 9139      LD	R19,Y+
      D8 9189      LD	R24,Y+
      D9 9199      LD	R25,Y+
      DA 91A9      LD	R26,Y+
      DB 91B9      LD	R27,Y+
      DC 91E9      LD	R30,Y+
      DD 91F9      LD	R31,Y+
      DE 9508      RET