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📄 defbf538_add.h

📁 General EXAMPLE project for initialization code. This file will be executed on the processor prior
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/****************************************************************************************
 Additional masks and macro definitions that are missed in 'defBF538.h' OR 'defBF532.h'
 to allow the programmer to use symbolic names for register-access and bit-manipulation 
****************************************************************************************/

/* ********************* PLL AND RESET MASKS ************************ */
/* PLL_CTL Masks */
#define MSEL                    0x7E00              /* Multiplier Select For CCLK/VCO Factors */
#undef SET_IN_DELAY
#define SET_IN_DELAY(x)         ((((x)&0x02) << 0x3) | (((x)&0x01) << 0x2))

/* VR_CTL Masks */
#define VLEV_125                0x00E0              /* VLEV = 1.25 V (-5% - +10% Accuracy) */
#define VLEV_130                0x00F0              /* VLEV = 1.30 V (-5% - +10% Accuracy) */


/* **********************  SDRAM CONTROLLER MASKS  *************************** */
/* EBIU_SDBCTL Masks */
#define EBSZ                    0x000E              /* SDRAM external bank size */
#define EBCAW                   0x0030              /* SDRAM external bank column address width */

/* EBIU_SDGCTL Masks */
#define CL                      0x0000000C          /* SDRAM CAS latency */
#define PASR                    0x00000030          /* SDRAM partial array self-refresh */
#define TRAS                    0x000003C0          /* SDRAM tRAS in SCLK cycles */
#define TRP                     0x00003800          /* SDRAM tRP in SCLK cycles */
#define TRCD                    0x00030000          /* SDRAM tRCD in SCLK cycles */
#define TWR                     0x00180000          /* SDRAM tWR in SCLK cycles */


/****************************************************************************
 EOF
*****************************************************************************/

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