uart.asm

General EXAMPLE project for initialization code. This file will be executed on the processor prior

/****************************************************************************
 Include Section
*****************************************************************************/

#include "macros.h"
#include "libdsp.h"
#include "system.h"

#if defined __ADSPBF537__
    #include "ezkitBF537_initcode.h"
#endif

/*****************************************************************************
 Prototypes
******************************************************************************/

#if defined __ADSPBF537__
    .GLOBAL __uart0_save_bitrate;
    .GLOBAL __uart0_set_bitrate;
#endif

/*****************************************************************************
 Variables
******************************************************************************/

.SECTION L1_data;
.ALIGN 4;
#if defined __ADSPBF537__
.BYTE4 _b4_UART0_BIT_RATE;
#endif

/*****************************************************************************
 Functions
******************************************************************************/

.section L1_code;


#if defined __ADSPBF537__


/****************************************************************************
 Name:                  uart0_save_bitrate
 Description:           get current UART Bit Rate 
 Input Parameters:      none
 Return Parameters:     none
 Registers Used:        R7:6,R1:0,P5:4
 Global Registers Used: none
 Global Variables Used: _b4_UART0_BIT_RATE = R0 = UART Divisor * 16 = BIT RATE
 C-Callable :           no
*****************************************************************************/

__uart0_save_bitrate:

    link 0;
    [--SP] = ASTAT;
    [--SP] = (R7:0,P5:4);
    IMM32(P5,SYS_MMR_BASE);


    /* Set Divisor Latch Access Bit in UART0_LCR */
    R5 = w[P5 + lo(UART0_LCR)] (z);
    bitset(R5,bitpos(DLAB));
    w[P5 + lo(UART0_LCR)] = R5;

    R7 = w[P5 + lo(UART0_DLH)] (z);
    R7 <<= 8;

    R6 = w[P5 + lo(UART0_DLL)] (z);

    /* Combine UART Divisor to UART0_DLH & UART0_DLL */
    R1 = R7 | R6;
    R7 = 0x10 (z);
    R1 *= R7;

    /* Clear Divisor Latch Access Bit in UART0_LCR */
    bitclr(R5,bitpos(DLAB));
    w[P5 + lo(UART0_LCR)] = R5;

    call __get_sclk_hz;   /* R0 = current SCLK [Hz] */

    /* get current UART Bit Rate */
    udiv32(); /* Registers passed: Dividend = R0, Divisor = R1, Quotient -> R0 */

    /* Save UART Bit Rate */
    IMM32(P4,_b4_UART0_BIT_RATE);
    [P4] = R0;


    (R7:0,P5:4) = [SP++];
    ASTAT = [SP++];
    unlink;
    rts;

__uart0_save_bitrate.end:


/****************************************************************************
 Name:                  __uart0_set_bitrate
 Description:           calculate and set UART Divisor latch registers
                        UART0_DLH & UART0_DLL that fits former Bit Rate
                        and new system clock
                        Send out new parameters over UART:
                        0xBF, UART0_DLL, UART0_DLH, 0x0
 Input Parameters:      none
 Return Parameters:     none
 Registers Used:        R7:6,R1:0,P5:4
 Global Registers Used: none
 Global Variables Used: _b4_UART0_BIT_RATE = R0 = UART Divisor * 16 = BIT RATE
 C-Callable :           no
*****************************************************************************/

__uart0_set_bitrate:

    link 0;
    [--SP] = ASTAT;
    [--SP] = (R7:0,P5:4);
    IMM32(P5,SYS_MMR_BASE);


    call __get_sclk_hz;      /* R0 = current SCLK [Hz] */

    IMM32(P4,_b4_UART0_BIT_RATE);
    R1 = [P4];

    /* calculate new UART Divisor */
    /* Divide SCLK [Hz] by 16 * Bit Rate */
    R7 = 0x10;
    R1 *= R7;

    udiv32(); /* Registers passed: Dividend = R0, Divisor = R1, Quotient -> R0 */

    /* Set Divisor Latch Access Bit in UART0_LCR */
    R5 = w[P5 + lo(UART0_LCR)] (z);
    bitset(R5,bitpos(DLAB));
    w[P5 + lo(UART0_LCR)] = R5;

    /* Split UART Divisor to UART0_DLH & UART0_DLL */
    R7 = UARTDLH (z);
    R7 = R0 & R7;
    R7 >>= 8;
    w[P5 + lo(UART0_DLH)] = R7;

    R6 = UARTDLL (z);
    R6 = R0 & R6;
    w[P5 + lo(UART0_DLL)] = R6;

    /* Clear Divisor Latch Access Bit in UART0_LCR */
    bitclr(R5,bitpos(DLAB));
    w[P5 + lo(UART0_LCR)] = R5;

    /************************************************************
     Signal the completion of the autobaud detection to the host.
     Four bytes are transmitted back to the host:
        0xBF (which stands for Blackfin)
        UART_DLL value
        UART_DLH value
        0x00 to terminate string
    ************************************************************/
    P4 = 4;
    R7 <<= 8;
    R7 = R7|R6;
    R6 = 0xBF (z);
    R7 <<= 8;
    R7 = R7|R6;

    lsetup (uart0_set_bitrate.loop_begin,uart0_set_bitrate.loop_end) LC0 = P4;
    uart0_set_bitrate.loop_begin:   R6 = w[P5 + lo(UART0_LSR)] (z);
                                    CC = bittst(R6,bitpos(THRE));
                                    if !CC jump uart0_set_bitrate.loop_begin;
                                    w[P5 + lo(UART0_THR)] = R7;
    uart0_set_bitrate.loop_end:     R7 >>= 8;

    /*********************************************************
     Wait until last byte has been sent for half-duplex apps.
    *********************************************************/
    uart0_set_bitrate.tx_temt:
    R6 = w[P5 + lo(UART0_LSR)] (z);
    CC = bittst(R6,bitpos(TEMT));
    if !CC jump uart0_set_bitrate.tx_temt;


    (R7:0,P5:4) = [SP++];
    ASTAT = [SP++];
    unlink;
    rts;

__uart0_set_bitrate.end:


#endif


/****************************************************************************
 EOF
*****************************************************************************/