📄 cnfdsp_nohost.c
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/*******************************************************************************
* FILENAME
* cnfdsp_nohost.c
*
* DESCRIPTION
* DSK Confidence test - DSP Code - No Host
*
* Rev 2.16 17 Jul 2000 T.J.Dillon - SDRAM update, C6711 update
*
*******************************************************************************/
#include <stdio.h>
#include <csl.h>
#include <csl_chip.h>
#include <csl_edma.h>
#include <csl_emif.h>
#include <csl_irq.h>
#include <csl_mcbsp.h>
#include <csl_timer.h>
#include <bsl.h>
#include <bsl_board.h>
#include <bsl_dip.h>
#include <bsl_ad535.h>
#include "cnfDSP_nohost.h"
/*******************************************************************************
* Global variables *
*******************************************************************************/
TIMER_Handle hTimer;
TIMER_Config myTimerConfig = {
0x000003F0, /* CTL register - CPU CLK/4 */
0x00000500, /* PRD register */
0x00000000 /* CNT register */
};
MCBSP_Handle hMcbsp;
AD535_Handle hAD535;
AD535_Config myConfig = { AD535_LOOPBACK_DISABLE,
AD535_MICGAIN_OFF,
AD535_GAIN_0DB,
AD535_GAIN_0DB
};
short sin_table[] = {0, 23170>>2, 32767>>2, 23170>>2,0, -23170>>2, -32767>>2, -23170>>2};
int volatile flag;
//static int exp_chksum,cmp_chksum;
/*-------------------------------------------------------------------------*/
/* main() */
/*-------------------------------------------------------------------------*/
int main()
{
int src,dst,size; /* Used for QDMA */
int error;
Uint32 pwb_assy_rev;
int ext_mem_size;
/* Initialize the chip support library, required */
CSL_init();
/* Initialize the board support library, required */
BSL_init();
/* dsp and periphiral initialization */
CHIP_CSR_SET(0x100); /* Disable all interrupts */
CHIP_IER_SET(1); /* Disable all interrupts except NMI */
CHIP_ICR_SET(0xffff); /* Clear all pending interrupts */
/*************************************************************************
* Standard 6211 DSK includes 2 MT48LC1M16A1-7 devices =>4MB SDRAM *
* 16Mb (16-bit x 2 banks x 512K) parts = 2MB / part *
* EMIF_SDCTRL=0x07227000 *
* EMIF_SDEXT=0x54529 Board Rev = 1 *
*------------------------------------------------------------------------*
* Standard 6711 DSK includes 2 MT48LC4M16A2-8 devices =>16MB SDRAM *
* 64Mb (16-bit x 4 banks x 1M) parts = 8MB / part *
* EMIF_SDCTRL=0x57116000 *
* EMIF_SDEXT=0x54529 (Hitachi 0x54509) Board Rev = 2 *
*------------------------------------------------------------------------*
* Other 6711 DSK configurations are as follows: *
* 128Mb (16-bit x 4 banks x 2M) parts = 16MB / part (=>32MB SDRAM) *
* EMIF_SDCTRL=0x53116000 *
* EMIF_SDEXT=0x54529 (Hitachi 0x54509) Board Rev = 3 *
* ---------------------------------------------------------------------*
* 256Mb (16-bit x 4 banks x 4M) parts = 32MB / part (=>64MB SDRAM) *
* EMIF_SDCTRL=0x63116000 *
* EMIF_SDEXT=0x54529 Board Rev = 4 *
*************************************************************************/
/******************************************************************************\
* CONFIGURE EMIF *
\******************************************************************************/
EMIF_configB(0x00003300, /* EMIF global control register */
0xFFFFFF30, /* CE0 - SDRAM */
0xFFFFFF23, /* CE1 - 32-bit asynch */
0xFFFFFF23, /* CE2 - 32-bit asynch on daughterboard */
0xFFFFFF23, /* CE3 - 32-bit asynch on daughterboard */
0x07117000, /* SDRAM control register (100 MHz) */
0x0000061A, /* SDRAM Timing register */
0x00054519 /* SDRAM Extension register */
);
printf("*TMS320C6211/6711 DSK Confidence Test - NoHost*\n");
/*-----------------------------------------------------------------------*/
/* Read DIP switches */
/*-----------------------------------------------------------------------*/
pwb_assy_rev=get_bdrev();
EMIF_CE1CTL_SET(0xFFFFFF03); /* CE1 - 8-bit asynch */
printf("\n USER_SW3=%d ", DIP_get(DIP_3));
printf(" USER_SW2=%d ", DIP_get(DIP_2));
printf(" USER_SW1=%d ", DIP_get(DIP_1));
printf(" Board Rev=%d\n\n",pwb_assy_rev);
/*-----------------------------------------------------------------------*/
/* Modify SDRAM parameter value(s) according to board revision */
/*-----------------------------------------------------------------------*/
switch (pwb_assy_rev) {
case 0: EMIF_SDCTL_SET(0x07126000);
ext_mem_size = EXTERNAL_MEM_SIZE;
break;
case 1: EMIF_SDCTL_SET(0x07227000);
ext_mem_size = EXTERNAL_MEM_SIZE;
break;
case 2: EMIF_SDCTL_SET(0x57116000);
ext_mem_size = 4*EXTERNAL_MEM_SIZE;
break;
case 3: EMIF_SDCTL_SET(0x53116000);
ext_mem_size = 8*EXTERNAL_MEM_SIZE;
break;
case 4: EMIF_SDCTL_SET(0x63116000);
ext_mem_size = 16*EXTERNAL_MEM_SIZE;
break;
}
printf("ISRAM TEST\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0x55555555 to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read 5's .....\n");
if(error=mem_test(ALL_5,INTERNAL_MEM_START,INTERNAL_MEM_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0xAAAAAAAA to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read A's .....\n");
if(error=mem_test(ALL_A,INTERNAL_MEM_START,INTERNAL_MEM_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the External SDRAM test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("SDRAM TEST\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0x5A5A5A5A to all even locations and read same */
/* Attempt to write 0xA5A5A5A5 to all odd locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read 5A's (even) A5's (odd).....\n");
if(error=mem_test_alt(ALT_5A,EXTERNAL_MEM_START,ext_mem_size))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0xA5A5A5A5 to all even locations and read same */
/* Attempt to write 0x5A5A5A5A to all odd locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read A5's (even) 5A's (odd)......\n");
if(error=mem_test_alt(ALT_A5,EXTERNAL_MEM_START,ext_mem_size))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the External FLASH test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("FLASH TEST\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0x55555555 to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read 5's.....\n");
if(error=flash_test(0x55,POST_END,FLASH_WRITE_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0xAAAAAAAA to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read A's......\n");
if(error=flash_test(0xAA,POST_END,FLASH_WRITE_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the MCBSP test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("MCBSP TEST\n");
printf(" Digital Loopback Mode.....\n");
/* open McBSP channel before testing */
hMcbsp = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
if(error=mcbsp0_test())
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/* close McBSP channel before proceeding */
MCBSP_close(hMcbsp);
/*-------------------------------------------------------------------*/
/* Run the TIMER test and return status */
/*-------------------------------------------------------------------*/
printf("TIMER TEST\n");
flag = 0;
/* set up Timer 0 for short period and start timer */
hTimer = TIMER_open(TIMER_DEV0, TIMER_OPEN_RESET);
TIMER_configA(hTimer, &myTimerConfig);
/* interrupt configuration */
IRQ_clear(IRQ_EVT_TINT0); /* clear interrupt 14 */
IRQ_enable(IRQ_EVT_TINT0); /* enable interrupt 14 (TIMER 0) and NMI */
CHIP_CSR_SET( CHIP_CSR_GET() | 1 ); /* enable global interrupts */
TIMER_start(hTimer);
/* wait for interrupt 14 to pause timer and toggle flag to 1 */
while (flag == 0);
TIMER_resume(hTimer);
/* wait for interrupt 14 to pause timer and toggle flag to 0 */
while (flag == 1);
CHIP_IER_SET(0); /* disable all interrupts */
printf(" Success.....\n");
EMIF_CE1CTL_SET(0xFFFFFF23); /* CE1 - 32-bit asynch */
/*-------------------------------------------------------------------*/
/* Run the QDMA test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("QDMA TEST\n");
/* interrupt configuration */
IRQ_clear(IRQ_EVT_EDMAINT); /* clear interrupt 14 */
IRQ_enable(IRQ_EVT_EDMAINT); /* enable interrupt 14 (TIMER 0) and NMI */
CHIP_CSR_SET( CHIP_CSR_GET() | 1 ); /* enable global interrupts */
flag = 0;
src = 0xf000;
dst = 0x80000000;
size = 500;
qdma_start(src,dst,size);
/* wait for interrupt 8 to halt transfer and toggle flag to 1 */
while (flag == 0) ;
error = qdma_check(src,dst,size);
if(error)
{
printf(" Fail.....\n");
exit(0);
}
CHIP_IER_SET(0); /* disable all interrupts */
printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the LEDS test and return information for debug */
/*-------------------------------------------------------------------*/
printf("LED TEST\n");
led_blink(5,1000); /* number of blinks, msec delay */
EMIF_CE1CTL_SET(0xFFFFFF03); /* CE1 - 8-bit asynch */
/*-------------------------------------------------------------------*/
/* Run the CODEC test and return status */
/*-------------------------------------------------------------------*/
printf("CODEC TEST\n");
hAD535 = AD535_open(AD535_localId);
AD535_config(hAD535, &myConfig);
printf(" Play 1KHz tone......\n");
if(error=play_codec(2000, 1))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
printf(" Play CD/MIC input.....\n");
if((error=play_codec(10000, 0)) != 0)
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------------*/
/* Wrap it up */
/*-----------------------------------------------------------------------*/
printf("\nThat's All Folks!\n");
TIMER_close(hTimer);
AD535_close(hAD535);
return (0);
}
/*-------------------------------------------------------------------------*/
/* mem_test() - used to test internal SRAM and external SDRAM */
/*-------------------------------------------------------------------------*/
int mem_test(int pattern, int start_address, int size_in_word )
{
int i;
int temp;
int error = 0;
int *mem_ptr = (int *)start_address;
for(i=0;i<size_in_word;i++) /* write pattern to the memory */
{
*mem_ptr++ = pattern;
}
mem_ptr = (int *)start_address;
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