bsl_dip.lst

This is Bsl.zip for DSP c6000

TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:11:56 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_dip.asm                                                          PAGE    1

       1                    ;******************************************************************************
       2                    ;* TMS320C6x ANSI C Codegen                   Version 4.10 Beta (May  4 2001) *
       3                    ;* Date/Time created: Tue May 29 12:11:56 2001                                *
       4                    ;******************************************************************************
       5                    
       6                    ;******************************************************************************
       7                    ;* GLOBAL FILE PARAMETERS                                                     *
       8                    ;*                                                                            *
       9                    ;*   Architecture      : TMS320C671x                                          *
      10                    ;*   Optimization      : Enabled at level 3                                   *
      11                    ;*   Optimizing for    : Speed                                                *
      12                    ;*                       Based on options: -o3, no -ms                        *
      13                    ;*   Endian            : Little                                               *
      14                    ;*   Interrupt Thrshld : Disabled                                             *
      15                    ;*   Memory Model      : Large                                                *
      16                    ;*   Calls to RTS      : Far                                                  *
      17                    ;*   Pipelining        : Enabled                                              *
      18                    ;*   Speculative Load  : Disabled                                             *
      19                    ;*   Memory Aliases    : Presume are aliases (pessimistic)                    *
      20                    ;*   Debug Info        : No Debug Info                                        *
      21                    ;*                                                                            *
      22                    ;******************************************************************************
      23                    
      24                            .asg    A15, FP
      25                            .asg    B14, DP
      26                            .asg    B15, SP
      27                            .global $bss
      28                    
      29                    
      30 00000000                   .sect   ".cinit"
      31                            .align  8
      32 00000000 00000004          .field          4,32
      33 00000004 00000000-         .field          _initialized$1+0,32
      34 00000008 00000000          .field          0,32                    ; _initialized$1 @ 0
      35 00000000                   .sect   ".text"
      36 00000000           _initialized$1: .usect  .far,4,4
      37                    ;       c:\ti\c6000\cgtools\bin\opt6x.exe -qq -v6711 -O3 C:\WINDOWS\TEMP\TI506495_2 C:\WINDOWS\TEMP\TI
      38 00000000                   .sect   ".text:__DIP_init"
      39                            .clink
      40                            .global __DIP_init
      41                    
      42                    ;******************************************************************************
      43                    ;* FUNCTION NAME: __DIP_init                                                  *
      44                    ;*                                                                            *
      45                    ;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,B0,B1,B2,B3,B4,*
      46                    ;*                           B5,B6,B7,B8,B9,SP                                *
      47                    ;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,B0,B1,B2,B3,B4,*
      48                    ;*                           B5,B6,B7,B8,B9,SP                                *
      49                    ;*   Local Frame Size  : 0 Args + 0 Auto + 12 Save = 12 byte                  *
      50                    ;******************************************************************************
      51 00000000           __DIP_init:
      52                    ;** --------------------------------------------------------------------------*
      53 00000000 00000028-            MVKL    .S1     _initialized$1,A0 ; |77| 
      54 00000004 00000068-            MVKH    .S1     _initialized$1,A0 ; |77| 
      55 00000008 00800264             LDW     .D1T1   *A0,A1            ; |77| 
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:11:56 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_dip.asm                                                          PAGE    2

      56 0000000c 0200002A!            MVKL    .S2     __BOARD_init,B4   ; |78| 
      57 00000010 0200006A!            MVKH    .S2     __BOARD_init,B4   ; |78| 
      58 00000014 00002000             NOP             2
      59 00000018 80000B10     [ A1]   B       .S1     L1                ; |77| 
      60 0000001c 05BC94F4             STW     .D2T1   A11,*SP--(16)     ; |74| 
      61                    
      62 00000020 0180262B+            MVKL    .S2     RL0,B3            ; |78| 
      63 00000024 01BC62F7  ||         STW     .D2T2   B3,*+SP(12)       ; |74| 
      64 00000028 058000A8  ||         MVK     .S1     1,A11             ; |79| 
      65                    
      66 0000002c 05000029-            MVKL    .S1     _initialized$1,A10 ; |79| 
      67 00000030 053C42F4  ||         STW     .D2T1   A10,*+SP(8)       ; |74| 
      68                    
      69 00000034 05000069-            MVKH    .S1     _initialized$1,A10 ; |79| 
      70 00000038 81BC62E7  || [ A1]   LDW     .D2T2   *+SP(12),B3       ; |81| 
      71 0000003c 0180006A+ ||         MVKH    .S2     RL0,B3            ; |78| 
      72                    
      73 00000040 00000000             NOP             1
      74                               ; BRANCH OCCURS                   ; |77| 
      75                    ;** --------------------------------------------------------------------------*
      76 00000044 00100362             B       .S2     B4                ; |78| 
      77 00000048 00008000             NOP             5
      78 0000004c           RL0:       ; CALL OCCURS                     ; |78| 
      79 0000004c 05A80274             STW     .D1T1   A11,*A10          ; |79| 
      80 00000050 01BC62E6             LDW     .D2T2   *+SP(12),B3       ; |81| 
      81 00000054 00000000             NOP             1
      82                    ;** --------------------------------------------------------------------------*
      83 00000058           L1:    
      84 00000058 053C42E4             LDW     .D2T1   *+SP(8),A10       ; |81| 
      85 0000005c 05BC92E4             LDW     .D2T1   *++SP(16),A11     ; |81| 
      86 00000060 00000000             NOP             1
      87 00000064 000C0362             B       .S2     B3                ; |81| 
      88 00000068 00008000             NOP             5
      89                               ; BRANCH OCCURS                   ; |81| 
      90                    
      91                    
      92 00000000                   .sect   ".text:_DIP_get"
      93                            .clink
      94                            .global _DIP_get
      95                    
      96                    ;******************************************************************************
      97                    ;* FUNCTION NAME: _DIP_get                                                    *
      98                    ;*                                                                            *
      99                    ;*   Regs Modified     : A0,A1,A3,A4,A5,A6,B0,B4,B5,B6,B7                     *
     100                    ;*   Regs Used         : A0,A1,A3,A4,A5,A6,B0,B3,B4,B5,B6,B7                  *
     101                    ;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
     102                    ;******************************************************************************
     103 00000000           _DIP_get:
     104                    ;** --------------------------------------------------------------------------*
     105 00000000 00000228             MVKL    .S1     0x1800004,A0      ; |87| 
     106 00000004 0000C068             MVKH    .S1     0x1800004,A0      ; |87|