rijndael-3.psm

UART transmitter and receiver mocros

                    ADD       pKey, 1
                    SUB       s0, 1
                    JUMP      NZ, SubWord1
                    RET       

; SubBytes( state, Nc )
SubBytes: 
                    LOAD      pState, state       ; get pointer to state

                    LOAD      s0, b128            ; set up loop count
sub128:             FETCH     s8, pState          ; get state byte
                    CALL      SBox
                    STORE     s8, pState          ; save new state byte
                    ADD       pState, 1           ; increment state pointer
                    SUB       s0, 1               ; decrement loop counter
                    JUMP      NZ, sub128          ; loop back if not done 16 times (128/8)
                    RET       

; SBox( s )
SBox: 
                    CALL      MulInverse          ; .    x = sbox_affine(mul_inverse(in));
SBoxAffine: 
; for(counter = 1; counter <= 4; counter++) {
                    LOAD      s8, s9              ; s = in;
                    RL        s9                  ; s = (s >> (DEGREE - 1)) | (s << 1); s &= MASK;
                    XOR       s8, s9              ; in ^= s;
                    RL        s9
                    XOR       s8, s9
                    RL        s9
                    XOR       s8, s9
                    RL        s9
                    XOR       s8, s9
                    XOR       s8, $63             ; in ^= 0x63;
                    RET                           ; return in;
; }

; MulInverse by trial and error
MulInverse: 
                    LOAD      s9, 0               ; int result = 0;
                    OR        s8, s8              ; if (in == 0)
                    RET       Z                   ; return 0;
MulInverse1:        ADD       s9, 1               ; result = 1; result++
                    RET       Z                   ; result < MOD
                    LOAD      sC, s8              ; in
                    LOAD      sD, s9              ; result
                    CALL      GMul                ; gmul( in, result, ...)
                    SUB       sE, 1               ; == 1
                    JUMP      NZ, MulInverse1     ; == 1?
                    RET                           ; return result

GMul: 
                    LOAD      sE, 0
GMul1: 
                    SR0       sD
                    JUMP      C, GMul2            ; last bit was 1
                    RET       Z                   ; i2 was 0 already ?
                    JUMP      GMul3

GMul2:              XOR       sE, sC
GMul3:              SL0       sC
                    JUMP      NC, GMul1
                    XOR       sC, G               ; i1 ^= field;
                    JUMP      GMul1

; ShiftRows( state, Nc )
ShiftRows: 
                    FETCH     s7, state + 1
                    FETCH     s4, state + 1 + 4
                    FETCH     s5, state + 1 + 4 + 4
                    FETCH     s6, state + 1 + 4 + 4 + 4
                    STORE     s4, state + 1
                    STORE     s5, state + 1 + 4
                    STORE     s6, state + 1 + 4 + 4
                    STORE     s7, state + 1 + 4 + 4 + 4

                    FETCH     s6, state + 2
                    FETCH     s7, state + 2 + 4
                    FETCH     s4, state + 2 + 4 + 4
                    FETCH     s5, state + 2 + 4 + 4 + 4
                    STORE     s4, state + 2
                    STORE     s5, state + 2 + 4
                    STORE     s6, state + 2 + 4 + 4
                    STORE     s7, state + 2 + 4 + 4 + 4

                    FETCH     s5, state + 3
                    FETCH     s6, state + 3 + 4
                    FETCH     s7, state + 3 + 4 + 4
                    FETCH     s4, state + 3 + 4 + 4 + 4
                    STORE     s4, state + 3
                    STORE     s5, state + 3 + 4
                    STORE     s6, state + 3 + 4 + 4
                    STORE     s7, state + 3 + 4 + 4 + 4

                    RET       

; MixColumns( state, Nc )
MixColumns: 

                    FETCH     s4, state + 0
                    FETCH     s5, state + 1
                    FETCH     s6, state + 2
                    FETCH     s7, state + 3
                    CALL      MixColumn
                    STORE     s4, state + 0
                    STORE     s5, state + 1
                    STORE     s6, state + 2
                    STORE     s7, state + 3

                    FETCH     s4, state + 0 + 4
                    FETCH     s5, state + 1 + 4
                    FETCH     s6, state + 2 + 4
                    FETCH     s7, state + 3 + 4
                    CALL      MixColumn
                    STORE     s4, state + 0 + 4
                    STORE     s5, state + 1 + 4
                    STORE     s6, state + 2 + 4
                    STORE     s7, state + 3 + 4

                    FETCH     s4, state + 0 + 4 + 4
                    FETCH     s5, state + 1 + 4 + 4
                    FETCH     s6, state + 2 + 4 + 4
                    FETCH     s7, state + 3 + 4 + 4
                    CALL      MixColumn
                    STORE     s4, state + 0 + 4 + 4
                    STORE     s5, state + 1 + 4 + 4
                    STORE     s6, state + 2 + 4 + 4
                    STORE     s7, state + 3 + 4 + 4

                    FETCH     s4, state + 0 + 4 + 4 + 4
                    FETCH     s5, state + 1 + 4 + 4 + 4
                    FETCH     s6, state + 2 + 4 + 4 + 4
                    FETCH     s7, state + 3 + 4 + 4 + 4
                    CALL      MixColumn
                    STORE     s4, state + 0 + 4 + 4 + 4
                    STORE     s5, state + 1 + 4 + 4 + 4
                    STORE     s6, state + 2 + 4 + 4 + 4
                    STORE     s7, state + 3 + 4 + 4 + 4

                    RET       

MixColumn: 
                    LOAD      s9, s4              ; t = c[0] ^ c[3]
                    XOR       s9, s7
                    LOAD      sA, s5              ; u = c[1] ^ c[2]
                    XOR       sA, s6
                    LOAD      sB, s9              ; v = t ^ u
                    XOR       sB, sA

                    LOAD      s8, s4              ; c[0] = c[0] ^ v ^ FFmul(0x02, c[0] ^ c[1])
                    XOR       s8, s5
                    SL0       s8
                    JUMP      NC, mcf1
                    XOR       s8, G
mcf1:               XOR       s8, sB
                    XOR       s4, s8

                    LOAD      s8, sA              ; c[1] = c[1] ^ v ^ FFmul(0x02, u)
                    SL0       s8
                    JUMP      NC, mcf2
                    XOR       s8, G
mcf2:               XOR       s8, sB
                    XOR       s5, s8

                    LOAD      s8, s6              ; c[2] = c[2] ^ v ^ FFmul(0x02, c[2] ^ c[3])
                    XOR       s8, s7
                    SL0       s8
                    JUMP      NC, mcf3
                    XOR       s8, G
mcf3:               XOR       s8, sB
                    XOR       s6, s8

                    LOAD      s8, s9              ; c[3] = c[3] ^ v ^ FFmul(0x02, t)
                    SL0       s8
                    JUMP      NC, mcf4
                    XOR       s8, G
mcf4:               XOR       s8, sB
                    XOR       s7, s8

                    RET