atan32_arch1.vhd

COriac Algorithm code

-- hds header_start
--
-- VHDL Entity Cordic.atan32.symbol
--
-- Created:
--          by - Hans.UNKNOWN (ACHILLES)
--          at - 14:55:58 03/29/03
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2002.1b (Build 7)
--
-- This library is free software; you can redistribute it and/or modify it 
-- under the terms of the GNU Lesser General Public License as published 
-- by the Free Software Foundation; either version 2.1 of the License, or 
-- (at your option) any later version.
--
-- This library is distributed in the hope that it will be useful, but WITHOUT 
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public 
-- License for more details.	 See http://www.gnu.org/copyleft/lesser.txt
--
-- hds header_end
-- ==============================================================================
-- Cordic 
-- Adder/Subtracter
-- no overflow.
-- ------------------------------------------------------------------------------
-- Version   Author          Date          Changes
-- 0.1       Hans Tiggeler   10/03/2000    Tested on Modelsim SE 5.5
-- ==============================================================================
LIBRARY IEEE;
USE IEEE.Std_Logic_1164.all;
USE IEEE.Std_Logic_arith.all;

ENTITY atan32 IS
   GENERIC( 
      WIDTH : integer := 24
   );
   PORT( 
      za    : IN     std_logic_vector (4 DOWNTO 0);
      zdata : OUT    std_logic_vector (WIDTH-1 DOWNTO 0)
   );

-- Declarations

END atan32 ;

-- hds interface_end

Architecture Arch1 of atan32 Is

signal ZData_s : std_logic_vector(31 downto 0);

Begin
	
  ZData <= ZData_s(31 downto 32-WIDTH); 	-- Connect to outside world
  process(ZA)
  begin
    Case ZA is	                           
       when "00000" => ZData_s <= X"3243f6a8";
       when "00001" => ZData_s <= X"1dac6705";
       when "00010" => ZData_s <= X"0fadbafc";
       when "00011" => ZData_s <= X"07f56ea6";
       when "00100" => ZData_s <= X"03feab76";
       when "00101" => ZData_s <= X"01ffd55b";
       when "00110" => ZData_s <= X"00fffaaa";
       when "00111" => ZData_s <= X"007fff55";
       when "01000" => ZData_s <= X"003fffea";
       when "01001" => ZData_s <= X"001ffffd";
       when "01010" => ZData_s <= X"000fffff";
       when "01011" => ZData_s <= X"0007ffff";
       when "01100" => ZData_s <= X"0003ffff";
       when "01101" => ZData_s <= X"0001ffff";
       when "01110" => ZData_s <= X"0000ffff";
       when "01111" => ZData_s <= X"00007fff";
       when "10000" => ZData_s <= X"00003fff";
       when "10001" => ZData_s <= X"00001fff";
       when "10010" => ZData_s <= X"00000fff";
       when "10011" => ZData_s <= X"000007ff";
       when "10100" => ZData_s <= X"000003ff";
       when "10101" => ZData_s <= X"000001ff";
       when "10110" => ZData_s <= X"000000ff";
       when "10111" => ZData_s <= X"0000007f";
       when "11000" => ZData_s <= X"0000003f";
       when "11001" => ZData_s <= X"0000001f";
       when "11010" => ZData_s <= X"0000000f";
       when "11011" => ZData_s <= X"00000007";
       when "11100" => ZData_s <= X"00000003";
       when "11101" => ZData_s <= X"00000001";
       when "11110" => ZData_s <= X"00000000";
       when "11111" => ZData_s <= X"00000000";
       When others  => ZData_s <= "--------------------------------";
    End Case;
  end process;
End Arch1;