📄 symbol.sb
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DocumentHdrVersion "1.1"
Header (DocumentHdr
packageRefs [
(PackageRef
library "ieee"
unitName "std_logic_1164"
itemName "all"
)
(PackageRef
library "ieee"
unitName "std_logic_arith"
itemName "all"
)
(PackageRef
library "ieee"
unitName "std_logic_unsigned"
itemName "all"
)
(PackageRef
library "cordic"
unitName "all"
itemName "all"
)
]
)
version "15.1"
appVersion "2002.1b (Build 7)"
model (Symbol
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\hdl"
)
(vvPair
variable "SideDataDesignDir"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src\\cordic\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src\\cordic\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src"
)
(vvPair
variable "appl"
value "HDL Designer - Pro"
)
(vvPair
variable "d"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src\\cordic"
)
(vvPair
variable "d_logical"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src\\cordic"
)
(vvPair
variable "date"
value "03/29/03"
)
(vvPair
variable "day"
value "Sat"
)
(vvPair
variable "day_long"
value "Saturday"
)
(vvPair
variable "dd"
value "29"
)
(vvPair
variable "ext"
value "sb"
)
(vvPair
variable "f"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "symbol.sb"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "ACHILLES"
)
(vvPair
variable "library"
value "Cordic"
)
(vvPair
variable "library_downstream_LeonardoSpectrum"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\work_ls"
)
(vvPair
variable "library_downstream_LeonardoSpectrum(GUI)"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\work_ls"
)
(vvPair
variable "library_downstream_ModelSim"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\work_mti"
)
(vvPair
variable "mm"
value "03"
)
(vvPair
variable "month"
value "Mar"
)
(vvPair
variable "month_long"
value "March"
)
(vvPair
variable "p"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src\\cordic\\symbol.sb"
)
(vvPair
variable "p_logical"
value "D:\\DEMO\\demo_hdl_designer\\Cordic\\src\\cordic\\symbol.sb"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "time"
value "10:57:39"
)
(vvPair
variable "unit"
value "cordic"
)
(vvPair
variable "user"
value "Hans"
)
(vvPair
variable "version"
value "2002.1b (Build 7)"
)
(vvPair
variable "view"
value "symbol"
)
(vvPair
variable "year"
value "2003"
)
(vvPair
variable "yy"
value "03"
)
]
)
uid 51,0
optionalChildren [
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optionalChildren [
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uid 57,0
optionalChildren [
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uid 62,0
pclass "comment"
pname "5,0"
pvalue "-- Active low reset"
ptn "String"
)
]
ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,31625,41000,32375"
)
n "reset"
t "std_logic"
o 2
r 1
d 0
s 0
sf 1
tg (CPTG
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ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
)
xt "42000,31350,43700,32350"
st "reset"
blo "42000,32150"
tm "CptPortNameMgr"
)
)
dt (MLText
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va (VaSet
font "Courier New,8,0"
)
xt "3000,29000,28500,29800"
st "reset : IN std_logic ; -- Active low reset
"
)
)
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uid 63,0
optionalChildren [
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uid 68,0
pclass "comment"
pname "5,0"
pvalue "-- input radian"
ptn "String"
)
]
ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,37625,41000,38375"
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n "angle"
t "std_logic_vector"
b "(WIDTH-1 downto 0)"
o 3
r 2
d 0
s 0
sf 1
tg (CPTG
uid 65,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
)
xt "42000,37350,49800,38350"
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blo "42000,38150"
tm "CptPortNameMgr"
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)
dt (MLText
uid 67,0
va (VaSet
font "Courier New,8,0"
)
xt "3000,29800,39000,30600"
st "angle : IN std_logic_vector (WIDTH-1 downto 0) ; -- input radian
"
)
)
*6 (CptPort
uid 69,0
ps "OnEdgeStrategy"
shape (Triangle
uid 70,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "63000,29625,63750,30375"
)
n "sin"
t "std_logic_vector"
b "(WIDTH-1 downto 0)"
m 1
o 4
r 3
d 0
s 0
sf 1
tg (CPTG
uid 71,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 72,0
va (VaSet
)
xt "55100,29350,62000,30350"
st "sin : (WIDTH-1:0)"
ju 2
blo "62000,30150"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 73,0
va (VaSet
font "Courier New,8,0"
)
xt "3000,30600,31000,31400"
st "sin : OUT std_logic_vector (WIDTH-1 downto 0) ;
"
)
)
*7 (CptPort
uid 74,0
ps "OnEdgeStrategy"
shape (Triangle
uid 75,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "63000,32625,63750,33375"
)
n "cos"
t "std_logic_vector"
b "(WIDTH-1 downto 0)"
m 1
o 5
r 4
d 0
s 0
sf 1
tg (CPTG
uid 76,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 77,0
va (VaSet
)
xt "54900,32350,62000,33350"
st "cos : (WIDTH-1:0)"
ju 2
blo "62000,33150"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 78,0
va (VaSet
font "Courier New,8,0"
)
xt "3000,31400,31000,32200"
st "cos : OUT std_logic_vector (WIDTH-1 downto 0) ;
"
)
)
*8 (CptPort
uid 79,0
ps "OnEdgeStrategy"
shape (Triangle
uid 80,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,40625,41000,41375"
)
n "start"
t "std_logic"
o 6
r 5
d 0
s 0
sf 1
tg (CPTG
uid 81,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 82,0
va (VaSet
)
xt "42000,40350,43500,41350"
st "start"
blo "42000,41150"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 83,0
va (VaSet
font "Courier New,8,0"
)
xt "3000,32200,18000,33000"
st "start : IN std_logic ;
"
)
)
*9 (CptPort
uid 84,0
ps "OnEdgeStrategy"
shape (Triangle
uid 85,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "63000,35625,63750,36375"
)
n "done"
t "std_logic"
m 1
o 7
r 6
d 0
s 0
sf 1
tg (CPTG
uid 86,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 87,0
va (VaSet
)
xt "60400,35350,62000,36350"
st "done"
ju 2
blo "62000,36150"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 88,0
va (VaSet
font "Courier New,8,0"
)
xt "3000,33000,17000,33800"
st "done : OUT std_logic
"
)
)
*10 (CptPort
uid 92,0
optionalChildren [
*11 (FFT
pts [
"41750,29000"
"41000,29375"
"41000,28625"
]
uid 98,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
)
xt "41000,28625,41750,29375"
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 93,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,28625,41000,29375"
)
n "clk"
t "std_logic"
o 1
r 7
d 0
s 0
sf 1
tg (CPTG
uid 94,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 95,0
va (VaSet
)
xt "42000,28350,42900,29350"
st "clk"
blo "42000,29150"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 96,0
va (VaSet
font "Courier New,8,0"
)
xt "3000,28200,18000,29000"
st "clk : IN std_logic ;
"
)
)
]
shape (Rectangle
uid 9,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "41000,27000,63000,44000"
)
oxt "15000,6000,31000,26000"
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "Arial,12,1"
)
xt "57200,39900,60900,41400"
st "Cordic"
blo "57200,41100"
)
second (Text
uid 12,0
va (VaSet
font "Arial,12,1"
)
xt "57200,41400,60800,42900"
st "cordic"
blo "57200,42600"
)
)
gi *12 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
font "Courier New,10,0"
)
xt "49000,22400,62800,26000"
st "Generic Declarations
WIDTH integer 24
"
)
header "Generic Declarations"
)
elements [
(GiElement
name "WIDTH"
type "integer"
value "24"
)
]
)
ordering 1
)
*13 (Grouping
uid 16,0
optionalChildren [
*14 (CommentText
uid 18,0
shape (Rectangle
uid 19,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,46000,51000,48000"
)
oxt "45000,22000,64000,24000"
text (MLText
uid 20,0
va (VaSet
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