jzlcd.h

jzlcd linux参考代码

	#define __spi_write_reg1(reg, val) \
	do { \
		unsigned char no;\
		unsigned short value;\
		unsigned char a=0;\
		unsigned char b=0;\
		a=reg;\
		b=val;\
		__gpio_set_pin(SPEN);\
		__gpio_set_pin(SPCK);\
		__gpio_clear_pin(SPDA);\
		__gpio_clear_pin(SPEN);\
		udelay(25);\
		value=((a<<8)|(b&0xFF));\
		for(no=0;no<16;no++)\
		{\
			__gpio_clear_pin(SPCK);\
			if((value&0x8000)==0x8000)\
			__gpio_set_pin(SPDA);\
			else\
			__gpio_clear_pin(SPDA);\
			udelay(25);\
			__gpio_set_pin(SPCK);\
			value=(value<<1); \
			udelay(25);\
		 }\
		__gpio_set_pin(SPEN);\
		udelay(100);\
	} while (0)

	#define __spi_write_reg(reg, val) \
	do {\
		__spi_write_reg1((reg<<2|2), val); \
		udelay(100); \
	}while(0)
	
	#define __lcd_special_pin_init() \
	do { \
		__gpio_as_output(SPEN); /* use SPDA */\
		__gpio_as_output(SPCK); /* use SPCK */\
		__gpio_as_output(SPDA); /* use SPDA */\
		__gpio_as_output(LCD_RET);\
		udelay(50);\
		__gpio_clear_pin(LCD_RET);\
		mdelay(150);\
		__gpio_set_pin(LCD_RET);\
	} while (0)

	#define __lcd_special_on() \
	do { \
		udelay(50);\
		__gpio_clear_pin(LCD_RET);\
		mdelay(150);\
		__gpio_set_pin(LCD_RET);\
		mdelay(10);\
		__spi_write_reg(0x00, 0x03); \
		__spi_write_reg(0x01, 0x40); \
		__spi_write_reg(0x02, 0x11); \
		__spi_write_reg(0x03, MODE); /* mode */ \
		__spi_write_reg(0x04, 0x32); \
		__spi_write_reg(0x05, 0x0e); \
		__spi_write_reg(0x07, 0x03); \
		__spi_write_reg(0x08, 0x08); \
		__spi_write_reg(0x09, 0x32); \
		__spi_write_reg(0x0A, 0x88); \
		__spi_write_reg(0x0B, 0xc6); \
		__spi_write_reg(0x0C, 0x20); \
		__spi_write_reg(0x0D, 0x20); \
	} while (0)	//reg 0x0a is control the display direction:DB0->horizontal level DB1->vertical level

/*		__spi_write_reg(0x02, 0x03); \
		__spi_write_reg(0x06, 0x40); \
		__spi_write_reg(0x0a, 0x11); \
		__spi_write_reg(0x0e, 0xcd); \
		__spi_write_reg(0x12, 0x32); \
		__spi_write_reg(0x16, 0x0e); \
		__spi_write_reg(0x1e, 0x03); \
		__spi_write_reg(0x22, 0x08); \
		__spi_write_reg(0x26, 0x40); \
		__spi_write_reg(0x2a, 0x88); \
		__spi_write_reg(0x2e, 0x88); \
		__spi_write_reg(0x32, 0x20); \
		__spi_write_reg(0x36, 0x20); \
*/
//	} while (0)	//reg 0x0a is control the display direction:DB0->horizontal level DB1->vertical level
	
	#define __lcd_special_off() \
	do { \
		__spi_write_reg(0x00, 0x03); \
	} while (0)

#endif	/* CONFIG_JZLCD_FOXCONN_PT035TN01 or CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL */


#ifndef __lcd_special_pin_init
#define __lcd_special_pin_init()
#endif
#ifndef __lcd_special_on
#define __lcd_special_on()
#endif
#ifndef __lcd_special_off
#define __lcd_special_off()
#endif


/*
 * Platform specific definition
 */

#if defined(CONFIG_JZ4730_GPS)

#define __lcd_set_backlight_level(n) \
do { \
	; \
} while (0)

#define __lcd_display_pin_init() \
do { \
	__lcd_special_pin_init(); \
	__gpio_as_output(94); /* PWM0 pin */ \
	__gpio_as_output(95); /* PWM1 pin */ \
} while (0)

#define __lcd_display_on() \
do { \
	__lcd_special_on(); \
	__gpio_set_pin(94); /* PWM0 pin */ \
	__gpio_set_pin(95); /* PWM1 pin */ \
	__lcd_set_backlight_level(8); \
} while (0)

#define __lcd_display_off() \
do { \
	__lcd_special_off(); \
} while (0)

#endif /* CONFIG_JZ4730_GPS */

#if defined(CONFIG_JZ4730_FPRINT)

#define __lcd_set_backlight_level(n) \
do { \
	REG_PWM_DUT(0) = n; \
	REG_PWM_PER(0) = 7; \
	REG_PWM_CTR(0) = 0x81; \
} while (0)

#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01)
		
#define __lcd_display_pin_init() \
do { \
	__lcd_special_pin_init();\
	__gpio_as_pwm();\
	__lcd_set_backlight_level(8);\
} while (0)

#define __lcd_display_on() \
do { \
	__lcd_set_backlight_level(8); \
	__lcd_special_on();\
} while (0)

#define __lcd_display_off() \
do { \
	__lcd_set_backlight_level(0); \
	__lcd_special_off();\
} while (0)

#else
	
#define __lcd_display_pin_init() \
do { \
	__gpio_as_output(GPIO_DISP_OFF_N); \
	__gpio_as_pwm(); \
	__lcd_set_backlight_level(8); \
} while (0)

#define __lcd_display_on() \
do { \
	__lcd_set_backlight_level(8); \
	__gpio_set_pin(GPIO_DISP_OFF_N); \
} while (0)
	
#define __lcd_display_off() \
do { \
	__lcd_set_backlight_level(0); \
	__gpio_clear_pin(GPIO_DISP_OFF_N); \
} while (0)
#endif

#endif /* CONFIG_JZ4730_FPRINT */

#if defined(CONFIG_JZ4730_LIBRA)

#define __lcd_set_backlight_level(n) \
do { \
} while (0)

#define __lcd_display_pin_init() \
do { \
	__lcd_special_pin_init(); \
	__gpio_clear_pin(100); \
	__gpio_as_output(100); \
	__gpio_as_output(94); \
	__gpio_as_output(95); \
	__lcd_set_backlight_level(8); \
} while (0)

#define __lcd_display_on() \
do { \
	__lcd_special_on(); \
	__gpio_set_pin(100); \
	__gpio_set_pin(94); \
	__gpio_set_pin(95); \
} while (0)

#define __lcd_display_off() \
do { \
	__lcd_special_off(); \
	__gpio_clear_pin(100); \
	__gpio_clear_pin(94); \
	__gpio_clear_pin(95); \
} while (0)

#endif /* CONFIG_JZ4730_LIBRA */

#if defined(CONFIG_JZ4730_PMP)

#define __lcd_set_backlight_level(n) \
do { \
	REG_PWM_DUT(0) = n; \
	REG_PWM_PER(0) = 7; \
	REG_PWM_CTR(0) = 0x81; \
} while (0)

#define __lcd_display_pin_init() \
do { \
	__gpio_as_output(GPIO_DISP_OFF_N); \
	__gpio_as_pwm(); \
	__lcd_set_backlight_level(10); \
	__lcd_special_pin_init(); \
} while (0)

#define __lcd_display_on() \
do { \
	__lcd_special_on(); \
	__lcd_set_backlight_level(8); \
	__gpio_set_pin(GPIO_DISP_OFF_N); \
} while (0)

#define __lcd_display_off() \
do { \
	__lcd_special_off(); \
	__lcd_set_backlight_level(0); \
	__gpio_clear_pin(GPIO_DISP_OFF_N); \
} while (0)

#endif /* CONFIG_JZ4730_PMP */

/*#if defined(CONFIG_JZ4740_LEO) || defined(CONFIG_JZ4740_PAVO)*/
#if defined(CONFIG_SOC_JZ4740)
#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA)
#define GPIO_PWM    123		/* GP_D27 */
#define PWM_CHN 4    /* pwm channel */
#define PWM_FULL 101
/* 100 level: 0,1,...,100 */
#define __lcd_set_backlight_level(n)\
do { \
__gpio_as_output(32*3+27); \
__gpio_set_pin(32*3+27); \
} while (0)

#define __lcd_close_backlight() \
do { \
__gpio_as_output(GPIO_PWM); \
__gpio_clear_pin(GPIO_PWM); \
} while (0)

#elif defined(CONFIG_JZ4720_VIRGO)
#define GPIO_PWM    119		/* GP_D23 */
#define PWM_CHN 0    /* pwm channel */
#define PWM_FULL 101
/* 100 level: 0,1,...,100 */
/*#define __lcd_set_backlight_level(n)                     \
do {                                                     \
	__gpio_as_pwm(0); \
        __tcu_disable_pwm_output(PWM_CHN);               \
        __tcu_stop_counter(PWM_CHN);                     \
        __tcu_init_pwm_output_high(PWM_CHN);             \
        __tcu_set_pwm_output_shutdown_abrupt(PWM_CHN);   \
        __tcu_select_clk_div1(PWM_CHN);                  \
        __tcu_mask_full_match_irq(PWM_CHN);              \
        __tcu_mask_half_match_irq(PWM_CHN);              \
        __tcu_set_count(PWM_CHN,0);                      \
        __tcu_set_full_data(PWM_CHN,__cpm_get_extalclk()/1000);           \
        __tcu_set_half_data(PWM_CHN,__cpm_get_extalclk()/1000*n/100);     \
        __tcu_enable_pwm_output(PWM_CHN);                \
        __tcu_select_extalclk(PWM_CHN);                  \
        __tcu_start_counter(PWM_CHN);                    \
} while (0)
*/

#define __lcd_set_backlight_level(n)			\
do {							\
       __gpio_as_output(GPIO_PWM);			\
       __gpio_set_pin(GPIO_PWM);			\
} while (0)

#define __lcd_close_backlight() \
do { \
__gpio_as_output(GPIO_PWM); \
__gpio_clear_pin(GPIO_PWM); \
} while (0)

#else
#define __lcd_set_backlight_level(n)
#define __lcd_close_backlight()

#endif /* #if defined(CONFIG_MIPS_JZ4740_PAVO) */

#define __lcd_display_pin_init() \
do { \
	__gpio_as_output(GPIO_DISP_OFF_N); \
	__cpm_start_tcu(); \
	__lcd_special_pin_init(); \
} while (0)
/*	__lcd_set_backlight_level(100); \*/
#define __lcd_display_on() \
do { \
	__gpio_set_pin(GPIO_DISP_OFF_N); \
	__lcd_special_on(); \
	__lcd_set_backlight_level(80); \
} while (0)

#define __lcd_display_off() \
do { \
	__lcd_special_off(); \
	__lcd_close_backlight(); \
	__gpio_clear_pin(GPIO_DISP_OFF_N); \
} while (0)

#endif /* CONFIG_MIPS_JZ4740_LEO */

#if defined(CONFIG_JZLCD_MSTN_240x128)

#if 0	/* The final version does not use software emulation of VCOM. */

#define GPIO_VSYNC	59
#define GPIO_VCOM	90

#define REG_VCOM	REG_GPIO_GPDR((GPIO_VCOM>>5))
#define VCOM_BIT	(1 << (GPIO_VCOM & 0x1f))
static unsigned int vcom_static;
static void vsync_irq(int irq, void *dev_id, struct pt_regs *reg)
{
	vcom_static = REG_VCOM;
	vcom_static ^= VCOM_BIT;
	REG_VCOM = vcom_static;
}

#define __lcd_display_pin_init()					  \
	__gpio_as_irq_rise_edge(GPIO_VSYNC);				  \
	__gpio_as_output(GPIO_VCOM);					  \
	{								  \
	static int inited = 0;						  \
	if (!inited) {							  \
	inited = 1;							  \
	if (request_irq(IRQ_GPIO_0 + GPIO_VSYNC, vsync_irq, SA_INTERRUPT, \
			"vsync", 0)) {					  \
		err = -EBUSY;						  \
		goto failed;						  \
	}}}

#endif

/* We uses AC BIAs pin to generate VCOM signal, so above code should be removed.
 */
#endif
/*****************************************************************************
 * LCD display pin dummy macros
 *****************************************************************************/
#ifndef __lcd_display_pin_init
#define __lcd_display_pin_init()
#endif
#ifndef __lcd_display_on
#define __lcd_display_on()
#endif
#ifndef __lcd_display_off
#define __lcd_display_off()
#endif
#ifndef __lcd_set_backlight_level
#define __lcd_set_backlight_level(n)
#endif

#endif /* __JZLCD_H__ */