cslr_rti.h

Configuring External Interrupts on TMS320C672x Devices

#define CSL_RTI_RTIUDCP1_UDCP1_MASK      (0xFFFFFFFFu)
#define CSL_RTI_RTIUDCP1_UDCP1_SHIFT     (0x00000000u)
#define CSL_RTI_RTIUDCP1_UDCP1_RESETVAL  (0x00000000u)

#define CSL_RTI_RTIUDCP1_RESETVAL        (0x00000000u)

/* RTICOMP2 */

#define CSL_RTI_RTICOMP2_COMP2_MASK      (0xFFFFFFFFu)
#define CSL_RTI_RTICOMP2_COMP2_SHIFT     (0x00000000u)
#define CSL_RTI_RTICOMP2_COMP2_RESETVAL  (0x00000000u)

#define CSL_RTI_RTICOMP2_RESETVAL        (0x00000000u)

/* RTIUDCP2 */

#define CSL_RTI_RTIUDCP2_UDCP2_MASK      (0xFFFFFFFFu)
#define CSL_RTI_RTIUDCP2_UDCP2_SHIFT     (0x00000000u)
#define CSL_RTI_RTIUDCP2_UDCP2_RESETVAL  (0x00000000u)

#define CSL_RTI_RTIUDCP2_RESETVAL        (0x00000000u)

/* RTICOMP3 */

#define CSL_RTI_RTICOMP3_COMP3_MASK      (0xFFFFFFFFu)
#define CSL_RTI_RTICOMP3_COMP3_SHIFT     (0x00000000u)
#define CSL_RTI_RTICOMP3_COMP3_RESETVAL  (0x00000000u)

#define CSL_RTI_RTICOMP3_RESETVAL        (0x00000000u)

/* RTIUDCP3 */

#define CSL_RTI_RTIUDCP3_UDCP3_MASK      (0xFFFFFFFFu)
#define CSL_RTI_RTIUDCP3_UDCP3_SHIFT     (0x00000000u)
#define CSL_RTI_RTIUDCP3_UDCP3_RESETVAL  (0x00000000u)

#define CSL_RTI_RTIUDCP3_RESETVAL        (0x00000000u)

/* RTISETINT */

#define CSL_RTI_RTISETINT_SETOVL1INT_MASK (0x00040000u)
#define CSL_RTI_RTISETINT_SETOVL1INT_SHIFT (0x00000012u)
#define CSL_RTI_RTISETINT_SETOVL1INT_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETOVL0INT_MASK (0x00020000u)
#define CSL_RTI_RTISETINT_SETOVL0INT_SHIFT (0x00000011u)
#define CSL_RTI_RTISETINT_SETOVL0INT_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETDMA3_MASK   (0x00000800u)
#define CSL_RTI_RTISETINT_SETDMA3_SHIFT  (0x0000000Bu)
#define CSL_RTI_RTISETINT_SETDMA3_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETDMA2_MASK   (0x00000400u)
#define CSL_RTI_RTISETINT_SETDMA2_SHIFT  (0x0000000Au)
#define CSL_RTI_RTISETINT_SETDMA2_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETDMA1_MASK   (0x00000200u)
#define CSL_RTI_RTISETINT_SETDMA1_SHIFT  (0x00000009u)
#define CSL_RTI_RTISETINT_SETDMA1_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETDMA0_MASK   (0x00000100u)
#define CSL_RTI_RTISETINT_SETDMA0_SHIFT  (0x00000008u)
#define CSL_RTI_RTISETINT_SETDMA0_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETINT3_MASK   (0x00000008u)
#define CSL_RTI_RTISETINT_SETINT3_SHIFT  (0x00000003u)
#define CSL_RTI_RTISETINT_SETINT3_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETINT2_MASK   (0x00000004u)
#define CSL_RTI_RTISETINT_SETINT2_SHIFT  (0x00000002u)
#define CSL_RTI_RTISETINT_SETINT2_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETINT1_MASK   (0x00000002u)
#define CSL_RTI_RTISETINT_SETINT1_SHIFT  (0x00000001u)
#define CSL_RTI_RTISETINT_SETINT1_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_SETINT0_MASK   (0x00000001u)
#define CSL_RTI_RTISETINT_SETINT0_SHIFT  (0x00000000u)
#define CSL_RTI_RTISETINT_SETINT0_RESETVAL (0x00000000u)

#define CSL_RTI_RTISETINT_RESETVAL       (0x00000000u)

/* RTICLEARINT */

#define CSL_RTI_RTICLEARINT_CLEAROVL1INT_MASK (0x00040000u)
#define CSL_RTI_RTICLEARINT_CLEAROVL1INT_SHIFT (0x00000012u)
#define CSL_RTI_RTICLEARINT_CLEAROVL1INT_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEAROVL0INT_MASK (0x00020000u)
#define CSL_RTI_RTICLEARINT_CLEAROVL0INT_SHIFT (0x00000011u)
#define CSL_RTI_RTICLEARINT_CLEAROVL0INT_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARDMA3_MASK (0x00000800u)
#define CSL_RTI_RTICLEARINT_CLEARDMA3_SHIFT (0x0000000Bu)
#define CSL_RTI_RTICLEARINT_CLEARDMA3_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARDMA2_MASK (0x00000400u)
#define CSL_RTI_RTICLEARINT_CLEARDMA2_SHIFT (0x0000000Au)
#define CSL_RTI_RTICLEARINT_CLEARDMA2_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARDMA1_MASK (0x00000200u)
#define CSL_RTI_RTICLEARINT_CLEARDMA1_SHIFT (0x00000009u)
#define CSL_RTI_RTICLEARINT_CLEARDMA1_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARDMA0_MASK (0x00000100u)
#define CSL_RTI_RTICLEARINT_CLEARDMA0_SHIFT (0x00000008u)
#define CSL_RTI_RTICLEARINT_CLEARDMA0_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARINT3_MASK (0x00000008u)
#define CSL_RTI_RTICLEARINT_CLEARINT3_SHIFT (0x00000003u)
#define CSL_RTI_RTICLEARINT_CLEARINT3_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARINT2_MASK (0x00000004u)
#define CSL_RTI_RTICLEARINT_CLEARINT2_SHIFT (0x00000002u)
#define CSL_RTI_RTICLEARINT_CLEARINT2_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARINT1_MASK (0x00000002u)
#define CSL_RTI_RTICLEARINT_CLEARINT1_SHIFT (0x00000001u)
#define CSL_RTI_RTICLEARINT_CLEARINT1_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_CLEARINT0_MASK (0x00000001u)
#define CSL_RTI_RTICLEARINT_CLEARINT0_SHIFT (0x00000000u)
#define CSL_RTI_RTICLEARINT_CLEARINT0_RESETVAL (0x00000000u)

#define CSL_RTI_RTICLEARINT_RESETVAL     (0x00000000u)

/* RTIINTFLAG */

#define CSL_RTI_RTIINTFLAG_OVL1INT_MASK  (0x00040000u)
#define CSL_RTI_RTIINTFLAG_OVL1INT_SHIFT (0x00000012u)
#define CSL_RTI_RTIINTFLAG_OVL1INT_RESETVAL (0x00000000u)

/*----OVL1INT Tokens----*/
#define CSL_RTI_RTIINTFLAG_OVL1INT_CLEAROVFINT1 (0x00000001u)

#define CSL_RTI_RTIINTFLAG_OVL0INT_MASK  (0x00020000u)
#define CSL_RTI_RTIINTFLAG_OVL0INT_SHIFT (0x00000011u)
#define CSL_RTI_RTIINTFLAG_OVL0INT_RESETVAL (0x00000000u)

/*----OVL0INT Tokens----*/
#define CSL_RTI_RTIINTFLAG_OVL0INT_CLEAROVFINT0 (0x00000001u)

#define CSL_RTI_RTIINTFLAG_INT3_MASK     (0x00000008u)
#define CSL_RTI_RTIINTFLAG_INT3_SHIFT    (0x00000003u)
#define CSL_RTI_RTIINTFLAG_INT3_RESETVAL (0x00000000u)

/*----INT3 Tokens----*/
#define CSL_RTI_RTIINTFLAG_INT3_CLEARINT3 (0x00000001u)

#define CSL_RTI_RTIINTFLAG_INT2_MASK     (0x00000004u)
#define CSL_RTI_RTIINTFLAG_INT2_SHIFT    (0x00000002u)
#define CSL_RTI_RTIINTFLAG_INT2_RESETVAL (0x00000000u)

/*----INT2 Tokens----*/
#define CSL_RTI_RTIINTFLAG_INT2_CLEARINT2 (0x00000001u)

#define CSL_RTI_RTIINTFLAG_INT1_MASK     (0x00000002u)
#define CSL_RTI_RTIINTFLAG_INT1_SHIFT    (0x00000001u)
#define CSL_RTI_RTIINTFLAG_INT1_RESETVAL (0x00000000u)

/*----INT1 Tokens----*/
#define CSL_RTI_RTIINTFLAG_INT1_CLEARINT1 (0x00000001u)

#define CSL_RTI_RTIINTFLAG_INT0_MASK     (0x00000001u)
#define CSL_RTI_RTIINTFLAG_INT0_SHIFT    (0x00000000u)
#define CSL_RTI_RTIINTFLAG_INT0_RESETVAL (0x00000000u)

/*----INT0 Tokens----*/
#define CSL_RTI_RTIINTFLAG_INT0_CLEARINT0 (0x00000001u)

#define CSL_RTI_RTIINTFLAG_RESETVAL      (0x00000000u)

/* RTIDWDCTRL */

#define CSL_RTI_RTIDWDCTRL_DWDCTRL_MASK  (0xFFFFFFFFu)
#define CSL_RTI_RTIDWDCTRL_DWDCTRL_SHIFT (0x00000000u)
#define CSL_RTI_RTIDWDCTRL_DWDCTRL_RESETVAL (0x5312ACEDu)

#define CSL_RTI_RTIDWDCTRL_RESETVAL      (0x5312ACEDu)

/* RTIDWDPRLD */

#define CSL_RTI_RTIDWDPRLD_DWDPRLD_MASK  (0x00001FFFu)
#define CSL_RTI_RTIDWDPRLD_DWDPRLD_SHIFT (0x00000000u)
#define CSL_RTI_RTIDWDPRLD_DWDPRLD_RESETVAL (0x00001FFFu)

#define CSL_RTI_RTIDWDPRLD_RESETVAL      (0x00001FFFu)

/* RTIWDSTATUS */

#define CSL_RTI_RTIWDSTATUS_KEYST_MASK   (0x00000004u)
#define CSL_RTI_RTIWDSTATUS_KEYST_SHIFT  (0x00000002u)
#define CSL_RTI_RTIWDSTATUS_KEYST_RESETVAL (0x00000000u)

#define CSL_RTI_RTIWDSTATUS_DWDST_MASK   (0x00000002u)
#define CSL_RTI_RTIWDSTATUS_DWDST_SHIFT  (0x00000001u)
#define CSL_RTI_RTIWDSTATUS_DWDST_RESETVAL (0x00000000u)

/*----DWDST Tokens----*/
#define CSL_RTI_RTIWDSTATUS_DWDST_CLEARDWD (0x00000001u)

#define CSL_RTI_RTIWDSTATUS_RESETVAL     (0x00000000u)

/* RTIWDKEY */

#define CSL_RTI_RTIWDKEY_WDKEY_MASK      (0x0000FFFFu)
#define CSL_RTI_RTIWDKEY_WDKEY_SHIFT     (0x00000000u)
#define CSL_RTI_RTIWDKEY_WDKEY_RESETVAL  (0x00000000u)

#define CSL_RTI_RTIWDKEY_RESETVAL        (0x00000000u)

/* RTIDWDCNTR */

#define CSL_RTI_RTIDWDCNTR_DWDCNTR_MASK  (0x01FFFFFFu)
#define CSL_RTI_RTIDWDCNTR_DWDCNTR_SHIFT (0x00000000u)
#define CSL_RTI_RTIDWDCNTR_DWDCNTR_RESETVAL (0x00000000u)

#define CSL_RTI_RTIDWDCNTR_RESETVAL      (0x00000000u)

#endif