csl_mcaspaux.h

Configuring External Interrupts on TMS320C672x Devices

        CSL_McaspHwSetupDataClk *rcvClkSet;
        
        rcvClkSet->clkSetupClk = 0x00001234;
        rcvClkSet->clkSetupHiClk = 0x004321;
        rcvClkSet->clkChk = 0x0000abcd;
        
        CSL_mcaspSetRcvClk (hMcasp, rcvClkSet);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspSetRcvClk (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupDataClk     *rcvClkSet             
)
{
	Uint32 bitValue = 0;

	/* Reset the bits in GBLCTL */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSRCLR, CLEAR);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSMRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RFRST, RESET);

	/* Set the High frequency serial clock */
	hMcasp->regs->AHCLKRCTL = (Uint16) rcvClkSet->clkSetupHiClk;

	if ((CSL_FEXT (hMcasp->regs->AHCLKRCTL, MCASP_AHCLKRCTL_HCLKRM) == TRUE)) {
		CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKR, OUTPUT);
	}

	/* Set the serial clock */
	hMcasp->regs->ACLKRCTL = (Uint32) rcvClkSet->clkSetupClk;

	if ((CSL_FEXT (hMcasp->regs->ACLKRCTL, MCASP_ACLKRCTL_CLKRM) == TRUE)) {
		CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKR, OUTPUT);
	}

	/* Start the serial clock */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST, ACTIVE);
	{
		while (bitValue != CSL_MCASP_GBLCTL_RCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST);
		}
	}

	/* Start the high frequency clock */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST, ACTIVE);
	{   
		bitValue = 0;
		while (bitValue != CSL_MCASP_GBLCTL_RHCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST);
		}
	}

	/* Set up the receive clock check control register */
	hMcasp->regs->RCLKCHK   = (Uint32) rcvClkSet->clkChk;
}

/** ===========================================================================
 *   @n@b CSL_mcaspSetXmtClk
 *
 *   @b Description
 *   @n This function configures the transmit clock circuitry with specified
 *      values
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            xmtClkSet       value to be loaded into transmit clock circuitry
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  ACLKXCTL, AHCLKXCTL, XCLKCHK register will be loaded with the
 *       specified values
 *
 *   @b  Modifies
 *   @n  GBLCTL, ACLKXCTL, AHCLKXCTL, XCLKCHK registers
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHwSetupDataClk *xmtClkSet;
        
        xmtClkSet->clkSetupClk = 0x00001234;
        xmtClkSet->clkSetupHiClk = 0x004321;
        xmtClkSet->clkChk = 0x0000abcd;
        
        CSL_mcaspSetXmtClk (hMcasp, xmtClkSet);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspSetXmtClk (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupDataClk     *xmtClkSet             
)
{
	Uint32 bitValue = 0;

	/* Reset the bits in GBLCTL */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSRCLR, CLEAR);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSMRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XFRST, RESET);

	/* Set the High frequency serial clock */
	hMcasp->regs->AHCLKXCTL = (Uint16) xmtClkSet->clkSetupHiClk;

	if ((CSL_FEXT (hMcasp->regs->AHCLKXCTL, MCASP_AHCLKXCTL_HCLKXM) == TRUE)) {
	CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKX, OUTPUT);
	}

	/* Set the serial clock */
	hMcasp->regs->ACLKXCTL = (Uint16) xmtClkSet->clkSetupClk;

	if ((CSL_FEXT (hMcasp->regs->ACLKXCTL, MCASP_ACLKXCTL_CLKXM) == TRUE)) {
	CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKX, OUTPUT);
	}

	/* Start the serial clock */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, ACTIVE);
	{
		while (bitValue != CSL_MCASP_GBLCTL_XCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST);
		}
	}

	/* Start the high frequency clock */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, ACTIVE);

	{
		bitValue = 0;
		while (bitValue != CSL_MCASP_GBLCTL_XHCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST);
		}
	}

	/* Set up the transmit clock check control register */
	hMcasp->regs->XCLKCHK   = (Uint32) xmtClkSet->clkChk;
}

/** ===========================================================================
 *   @n@b CSL_mcaspConfigXmtSection
 *
 *   @b Description
 *   @n This function configures format, frame sync, and other parameters
 *      related to the xmt section. Also configures the xmt clk section.
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            xmtData         transmit related parameters
            
            glbData         global hardware setup configuration
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Format, frame sync, and other parameters related to the xmt section
 *       are configured
 *
 *   @b  Modifies
 *   @n  XFMT, AFSXCTL and other transmit related registers
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHandle             hMcasp;
        CSL_McaspHwSetupData        *xmtData;
        CSL_McaspHwSetupDataGbl     *glbData;
        
        xmtData->fmt = 0x0000abcd;
        xmtData->frSyncCtl = 0x00001234;
        
        CSL_mcaspConfigXmtSection (hMcasp, xmtData, glbData);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspConfigXmtSection (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupData        *xmtData
)
{
	Uint32 bitValue = 0;

	/* Configure XMASK register */
	hMcasp->regs->XMASK     = xmtData->mask;

	/* Reset the XSMRST bit in GBLCTL register */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSMRST, RESET);

	/* Reset the RSMRST bit in GBLCTL register */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSMRST, RESET);

	/* Configure XFMT register */
	hMcasp->regs->XFMT      = (Uint32) xmtData->fmt;

	/*Reset the XFRST register in GBLCTL */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XFRST, RESET);

	/* Configure AFSXCTL register */
	hMcasp->regs->AFSXCTL = (Uint32) xmtData->frSyncCtl;

	if ((CSL_FEXT (hMcasp->regs->AFSXCTL, MCASP_AFSXCTL_FSXM) == TRUE)) {
	CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AFSX, OUTPUT);
	}

	/* Reset XHCLKRST, XCLKRST, XSRCLR  in GBLCTL */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSRCLR, CLEAR);

	/* Configure ACLKXCTL register */
	hMcasp->regs->ACLKXCTL  = (Uint32) xmtData->clk.clkSetupClk;

	if ((CSL_FEXT (hMcasp->regs->ACLKXCTL, MCASP_ACLKXCTL_CLKXM) == TRUE)) {
	CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKX, OUTPUT);
	}

	/* Configure AHCLKXCTL register */
	hMcasp->regs->AHCLKXCTL = (Uint32) xmtData->clk.clkSetupHiClk;

	if ((CSL_FEXT (hMcasp->regs->AHCLKXCTL, MCASP_AHCLKXCTL_HCLKXM) == TRUE)) {
	CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKX, OUTPUT);
	}

	/* start AHCLKX */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, ACTIVE);
	{
		bitValue = 0;
		while (bitValue != CSL_MCASP_GBLCTL_XHCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL,
			MCASP_GBLCTL_XHCLKRST);
		}
	}

	/* start ACLKX */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, ACTIVE);
	{
		bitValue = 0;
		while (bitValue != CSL_MCASP_GBLCTL_XCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL,
			MCASP_GBLCTL_XCLKRST);
		}
	}

	/* Configure XTDM register */
	hMcasp->regs->XTDM = (Uint32) xmtData->tdm;

	/* Configure XINTCTL register */
	hMcasp->regs->XINTCTL = (Uint32) xmtData->intCtl;

	/* Configure XCLKCHK register */
	hMcasp->regs->XCLKCHK   = (Uint32) xmtData->clk.clkChk;

	/* Configure XSTAT register */
	hMcasp->regs->XSTAT = (Uint32) xmtData->stat;

	/* Configure XEVTCTL register */
	hMcasp->regs->XEVTCTL = (Uint32) xmtData->evtCtl;
}

/** ===========================================================================
 *   @n@b CSL_mcaspConfigRcvSection
 *
 *   @b Description
 *   @n Configure the format, frame sync, and other parameters related to the
 *      rcv section. Also configures the rcv clk section.
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            rcvData         transmit related parameters
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Format, frame sync, and other parameters related to the rcv section
 *       are configured
 *
 *   @b  Modifies
 *   @n  RFMT, AFSRCTL and other receive related registers
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHandle             hMcasp;
        CSL_McaspHwSetupData        *rcvData;
        
        rcvData->fmt = 0x0000abcd;
        rcvData->frSyncCtl = 0x00001234;
        
        CSL_mcaspConfigXmtSection (hMcasp, rcvData);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspConfigRcvSection (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupData        *rcvData
)
{
	Uint32 bitValue = 0;

	/* Configure RMASK register */
	hMcasp->regs->RMASK = (Uint32) rcvData->mask;

	/* Reset the RSMRST bit in GBLCTL register */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSMRST, RESET);

	/* Configure RFMT register */
	hMcasp->regs->RFMT = (Uint32) rcvData->fmt;

	/*Reset the RFRST register in GBLCTL */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RFRST, RESET);

	/* Configure AFSRCTL register */
	hMcasp->regs->AFSRCTL = (Uint32) rcvData->frSyncCtl;

	if ((CSL_FEXT (hMcasp->regs->AFSRCTL, MCASP_AFSRCTL_FSRM) == TRUE)) {
		CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AFSR, OUTPUT);
	}

	/* Reset RHCLKRST, RCLKRST, RSRCLR in GBLCTL */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST, RESET);
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSRCLR, CLEAR);

	/* Configure ACLKRCTL register */
	hMcasp->regs->ACLKRCTL  = (Uint32) rcvData->clk.clkSetupClk;

	if ((CSL_FEXT (hMcasp->regs->ACLKRCTL, MCASP_ACLKRCTL_CLKRM) == TRUE)) {
		CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKR, OUTPUT);
	}

	/* Configure AHCLKRCTL register */
	hMcasp->regs->AHCLKRCTL = (Uint32) rcvData->clk.clkSetupHiClk;

	if ((CSL_FEXT (hMcasp->regs->AHCLKRCTL, MCASP_AHCLKRCTL_HCLKRM) == TRUE)) {
		CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKR, OUTPUT);
	}

	/* start ACLKR */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST, ACTIVE);
	{
		bitValue = 0;
		while (bitValue != CSL_MCASP_GBLCTL_RCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST);
		}
	}

	/* start AHCLKR */
	CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST, ACTIVE);
	{
		bitValue = 0;
		while (bitValue != CSL_MCASP_GBLCTL_RHCLKRST_ACTIVE) {
			bitValue = CSL_FEXT (hMcasp->regs->GBLCTL,
			MCASP_GBLCTL_RHCLKRST);
		}
	}

	/* Configure RTDM register */
	hMcasp->regs->RTDM = (Uint32) rcvData->tdm;

	/* Configure RINTCTL register */
	hMcasp->regs->RINTCTL = (Uint32) rcvData->intCtl;

	/* Configure RCLKCHK register */
	hMcasp->regs->RCLKCHK   = (Uint32) rcvData->clk.clkChk;

	/* Configure RSTAT register */
	hMcasp->regs->RSTAT = (Uint32) rcvData->stat;

	/* Configure REVTCTL register */
	hMcasp->regs->REVTCTL = (Uint32) rcvData->evtCtl;
}

/** ===========================================================================
 *   @n@b CSL_mcaspSetSerXmt
 *
 *   @b Description
 *   @n This function sets a particular serializer to act as transmitter
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            serNum          serializer number
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Particular serializer will be configured as transmitter
 *
 *   @b  Modifies
 *   @n  SRCTL register
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHandle         hMcasp;
        CSL_McaspSerializerNum  serNum = SERIALIZER_2;
        
        CSL_mcaspSetSerXmt (hMcasp, serNum);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspSetSerXmt (
    CSL_McaspHandle         hMcasp,
    CSL_McaspSerializerNum  serNum
)
{
	switch (serNum) 
	{
		case SERIALIZER_1:
			CSL_FINST (hMcasp->regs->SRCTL0, MCASP_SRCTL0_SRMOD, XMT);
			CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AXR0, OUTPUT);
			break;

		case SERIALIZER_2:
			CSL_FINST (hMcasp->regs->SRCTL1, MCASP_SRCTL1_SRMOD, XMT);
			CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AXR1, OUTPUT);
			break;

		case SERIALIZER_3:
			CSL_FINST (hMcasp->regs->SRCTL2, MCASP_SRCTL2_SRMOD, XMT);
			CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AXR2, OUTPUT);
			break;

		case SERIALIZER_4:
			CSL_FINST (hMcasp->regs->SRCTL3, MCASP_SRCTL3_SRMOD, XMT);
			CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AXR3, OUTPUT);
			break;

		case SERIALIZER_5:
			CSL_FINST (hMcasp->regs->SRCTL4, MCASP_SRCTL4_SRMOD, XMT);
			CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AXR4, OUTPUT);
			break;

		case SERIALIZER_6:
			CSL_FIN