cslr_i2c.h

Configuring External Interrupts on TMS320C672x Devices

#ifndef _CSLR_I2C_H_
#define _CSLR_I2C_H_
/*********************************************************************
 * Copyright (C) 2003-2005 Texas Instruments Incorporated. 
 * All Rights Reserved 
 *********************************************************************/
 /** \file cslr_i2c.h
 * 
 * \brief This file contains the Register Desciptions for I2C
 * 
 *********************************************************************/

#include <cslr.h>

#include <tistdtypes.h>

/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    volatile Uint16 ICOAR;
    volatile Uint8 RSVD0[2];
    volatile Uint16 ICIMR;
    volatile Uint8 RSVD1[2];
    volatile Uint16 ICSTR;
    volatile Uint8 RSVD2[2];
    volatile Uint16 ICCLKL;
    volatile Uint8 RSVD3[2];
    volatile Uint16 ICCLKH;
    volatile Uint8 RSVD4[2];
    volatile Uint16 ICCNT;
    volatile Uint8 RSVD5[2];
    volatile Uint16 ICDRR;
    volatile Uint8 RSVD6[2];
    volatile Uint16 ICSAR;
    volatile Uint8 RSVD7[2];
    volatile Uint16 ICDXR;
    volatile Uint8 RSVD8[2];
    volatile Uint16 ICMDR;
    volatile Uint8 RSVD9[2];
    volatile Uint16 ICIVR;
    volatile Uint8 RSVD10[2];
    volatile Uint16 ICEMDR;
    volatile Uint8 RSVD11[2];
    volatile Uint16 ICPSC;
    volatile Uint8 RSVD12[2];
    volatile Uint16 ICPID1;
    volatile Uint8 RSVD13[2];
    volatile Uint16 ICPID2;
    volatile Uint8 RSVD14[14];
    volatile Uint32 ICPFUNC;
    volatile Uint32 ICPDIR;
    volatile Uint32 ICPDIN;
    volatile Uint32 ICPDOUT;
    volatile Uint32 ICPDSET;
    volatile Uint32 ICPDCLR;
} CSL_I2cRegs;

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* ICOAR */

#define CSL_I2C_ICOAR_A_MASK             (0x03FFu)
#define CSL_I2C_ICOAR_A_SHIFT            (0x0000u)
#define CSL_I2C_ICOAR_A_RESETVAL         (0x0000u)

#define CSL_I2C_ICOAR_RESETVAL           (0x0000u)

/* ICIMR */

#define CSL_I2C_ICIMR_AAS_MASK           (0x0040u)
#define CSL_I2C_ICIMR_AAS_SHIFT          (0x0006u)
#define CSL_I2C_ICIMR_AAS_RESETVAL       (0x0000u)

/*----AAS Tokens----*/
#define CSL_I2C_ICIMR_AAS_DISABLE        (0x0000u)
#define CSL_I2C_ICIMR_AAS_ENABLE         (0x0001u)

#define CSL_I2C_ICIMR_SCD_MASK           (0x0020u)
#define CSL_I2C_ICIMR_SCD_SHIFT          (0x0005u)
#define CSL_I2C_ICIMR_SCD_RESETVAL       (0x0000u)

/*----SCD Tokens----*/
#define CSL_I2C_ICIMR_SCD_DISABLE        (0x0000u)
#define CSL_I2C_ICIMR_SCD_ENABLE         (0x0001u)

#define CSL_I2C_ICIMR_ICXRDY_MASK        (0x0010u)
#define CSL_I2C_ICIMR_ICXRDY_SHIFT       (0x0004u)
#define CSL_I2C_ICIMR_ICXRDY_RESETVAL    (0x0000u)

/*----ICXRDY Tokens----*/
#define CSL_I2C_ICIMR_ICXRDY_DISABLE     (0x0000u)
#define CSL_I2C_ICIMR_ICXRDY_ENABLE      (0x0001u)

#define CSL_I2C_ICIMR_ICRRDY_MASK        (0x0008u)
#define CSL_I2C_ICIMR_ICRRDY_SHIFT       (0x0003u)
#define CSL_I2C_ICIMR_ICRRDY_RESETVAL    (0x0000u)

/*----ICRRDY Tokens----*/
#define CSL_I2C_ICIMR_ICRRDY_DISABLE     (0x0000u)
#define CSL_I2C_ICIMR_ICRRDY_ENABLE      (0x0001u)

#define CSL_I2C_ICIMR_ARDY_MASK          (0x0004u)
#define CSL_I2C_ICIMR_ARDY_SHIFT         (0x0002u)
#define CSL_I2C_ICIMR_ARDY_RESETVAL      (0x0000u)

/*----ARDY Tokens----*/
#define CSL_I2C_ICIMR_ARDY_DISABLE       (0x0000u)
#define CSL_I2C_ICIMR_ARDY_ENABLE        (0x0001u)

#define CSL_I2C_ICIMR_NACK_MASK          (0x0002u)
#define CSL_I2C_ICIMR_NACK_SHIFT         (0x0001u)
#define CSL_I2C_ICIMR_NACK_RESETVAL      (0x0000u)

/*----NACK Tokens----*/
#define CSL_I2C_ICIMR_NACK_DISABLE       (0x0000u)
#define CSL_I2C_ICIMR_NACK_ENABLE        (0x0001u)

#define CSL_I2C_ICIMR_AL_MASK            (0x0001u)
#define CSL_I2C_ICIMR_AL_SHIFT           (0x0000u)
#define CSL_I2C_ICIMR_AL_RESETVAL        (0x0000u)

/*----AL Tokens----*/
#define CSL_I2C_ICIMR_AL_DISABLE         (0x0000u)
#define CSL_I2C_ICIMR_AL_ENABLE          (0x0001u)

#define CSL_I2C_ICIMR_RESETVAL           (0x0000u)

/* ICSTR */

#define CSL_I2C_ICSTR_SDIR_MASK          (0x4000u)
#define CSL_I2C_ICSTR_SDIR_SHIFT         (0x000Eu)
#define CSL_I2C_ICSTR_SDIR_RESETVAL      (0x0000u)

#define CSL_I2C_ICSTR_NACKSNT_MASK       (0x2000u)
#define CSL_I2C_ICSTR_NACKSNT_SHIFT      (0x000Du)
#define CSL_I2C_ICSTR_NACKSNT_RESETVAL   (0x0000u)

#define CSL_I2C_ICSTR_BB_MASK            (0x1000u)
#define CSL_I2C_ICSTR_BB_SHIFT           (0x000Cu)
#define CSL_I2C_ICSTR_BB_RESETVAL        (0x0000u)

#define CSL_I2C_ICSTR_RSFULL_MASK        (0x0800u)
#define CSL_I2C_ICSTR_RSFULL_SHIFT       (0x000Bu)
#define CSL_I2C_ICSTR_RSFULL_RESETVAL    (0x0000u)

#define CSL_I2C_ICSTR_XSMT_MASK          (0x0400u)
#define CSL_I2C_ICSTR_XSMT_SHIFT         (0x000Au)
#define CSL_I2C_ICSTR_XSMT_RESETVAL      (0x0001u)

#define CSL_I2C_ICSTR_AAS_MASK           (0x0200u)
#define CSL_I2C_ICSTR_AAS_SHIFT          (0x0009u)
#define CSL_I2C_ICSTR_AAS_RESETVAL       (0x0000u)

#define CSL_I2C_ICSTR_AD0_MASK           (0x0100u)
#define CSL_I2C_ICSTR_AD0_SHIFT          (0x0008u)
#define CSL_I2C_ICSTR_AD0_RESETVAL       (0x0000u)

#define CSL_I2C_ICSTR_SCD_MASK           (0x0020u)
#define CSL_I2C_ICSTR_SCD_SHIFT          (0x0005u)
#define CSL_I2C_ICSTR_SCD_RESETVAL       (0x0000u)

#define CSL_I2C_ICSTR_ICXRDY_MASK        (0x0010u)
#define CSL_I2C_ICSTR_ICXRDY_SHIFT       (0x0004u)
#define CSL_I2C_ICSTR_ICXRDY_RESETVAL    (0x0001u)

#define CSL_I2C_ICSTR_ICRRDY_MASK        (0x0008u)
#define CSL_I2C_ICSTR_ICRRDY_SHIFT       (0x0003u)
#define CSL_I2C_ICSTR_ICRRDY_RESETVAL    (0x0000u)

#define CSL_I2C_ICSTR_ARDY_MASK          (0x0004u)
#define CSL_I2C_ICSTR_ARDY_SHIFT         (0x0002u)
#define CSL_I2C_ICSTR_ARDY_RESETVAL      (0x0000u)

#define CSL_I2C_ICSTR_NACK_MASK          (0x0002u)
#define CSL_I2C_ICSTR_NACK_SHIFT         (0x0001u)
#define CSL_I2C_ICSTR_NACK_RESETVAL      (0x0000u)

#define CSL_I2C_ICSTR_AL_MASK            (0x0001u)
#define CSL_I2C_ICSTR_AL_SHIFT           (0x0000u)
#define CSL_I2C_ICSTR_AL_RESETVAL        (0x0000u)

#define CSL_I2C_ICSTR_RESETVAL           (0x0410u)

/* ICCLKL */

#define CSL_I2C_ICCLKL_ICCL_MASK         (0xFFFFu)
#define CSL_I2C_ICCLKL_ICCL_SHIFT        (0x0000u)
#define CSL_I2C_ICCLKL_ICCL_RESETVAL     (0x0000u)

#define CSL_I2C_ICCLKL_RESETVAL          (0x0000u)

/* ICCLKH */

#define CSL_I2C_ICCLKH_ICCH_MASK         (0xFFFFu)
#define CSL_I2C_ICCLKH_ICCH_SHIFT        (0x0000u)
#define CSL_I2C_ICCLKH_ICCH_RESETVAL     (0x0000u)

#define CSL_I2C_ICCLKH_RESETVAL          (0x0000u)

/* ICCNT */

#define CSL_I2C_ICCNT_ICDC_MASK          (0xFFFFu)
#define CSL_I2C_ICCNT_ICDC_SHIFT         (0x0000u)
#define CSL_I2C_ICCNT_ICDC_RESETVAL      (0x0000u)

#define CSL_I2C_ICCNT_RESETVAL           (0x0000u)

/* ICDRR */

#define CSL_I2C_ICDRR_D_MASK             (0x00FFu)
#define CSL_I2C_ICDRR_D_SHIFT            (0x0000u)
#define CSL_I2C_ICDRR_D_RESETVAL         (0x0000u)

#define CSL_I2C_ICDRR_RESETVAL           (0x0000u)

/* ICSAR */

#define CSL_I2C_ICSAR_A_MASK         (0x03FFu)
#define CSL_I2C_ICSAR_A_SHIFT        (0x0000u)
#define CSL_I2C_ICSAR_A_RESETVAL     (0x03FFu)

#define CSL_I2C_ICSAR_RESETVAL           (0x03FFu)

/* ICDXR */

#define CSL_I2C_ICDXR_D_MASK             (0x00FFu)