csl_pllcaux.h

Configuring External Interrupts on TMS320C672x Devices

        ...
        CSL_pllcSetSysClk3AlignControl (hPllc);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetSysClk3AlignControl (
    CSL_PllcHandle         hPllc
)
{   
	CSL_FINS (hPllc->regs->ALNCTL,PLLC_ALNCTL_ALN3,CSL_PLLC_ALNCTL_ALN3_ALIGN);            
}

/** ============================================================================
 *   @n@b CSL_pllcSetPllmMulFactor
 *
 *   @b Description
 *      Controls the Multiplier factor of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc Multiplier factor is Changed.
 *
 *   @b Modifies
 *   @n pllc PLLM register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        Uint16            loadVal = 0x08;
        ...
        CSL_pllcSetAlignControl (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetPllmMulFactor (
    CSL_PllcHandle         hPllc,
    Uint16                  loadVal
)
{
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLM,PLLC_PLLM_PLLM,loadVal);            

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv0Enable
 *
 *   @b Description
 *      Controls prescalar(DIV0) value of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV0) will be enabled / disabled.
 *
 *   @b Modifies
 *   @n pllc PLLDIV0 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl    loadVal ;
        loadVal.divControl.divEnable = CSL_PLLC_PLLDIV_ENABLE;
        ...
        CSL_pllcSetDiv0Enable (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv0Enable (
    CSL_PllcHandle                          hPllc,
    CSL_PllcDivState                        loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV0,PLLC_PLLDIV0_D0EN,
	loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv0Ratio
 *
 *   @b Description
 *      Controls the Ratio of prescalar(DIV0) of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV0) ratio will be changed.
 *
 *   @b Modifies
 *   @n pllc PLLDIV0 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl    loadVal;
        loadVal.divControl.pllRatio = 0x08;
        ...
        CSL_pllcSetDiv0Ratio (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv0Ratio (
    CSL_PllcHandle      hPllc,
    Uint32              loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV0,PLLC_PLLDIV0_RATIO,
	loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv1Enable
 *
 *   @b Description
 *      Controls prescalar(DIV1) value of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV1) will be enabled / disabled.
 *
 *   @b Modifies
 *   @n pllc PLLDIV1 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl    loadVal ;
        loadVal.divControl.divEnable = CSL_PLLC_PLLDIV_ENABLE;
        ...
        CSL_pllcSetDiv1Enable (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv1Enable (
    CSL_PllcHandle      hPllc,
    CSL_PllcDivState    loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV1,PLLC_PLLDIV1_D1EN,
	loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv1Ratio
 *
 *   @b Description
 *      Controls the Ratio of prescalar(DIV1) of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV1) ratio will be changed.
 *
 *   @b Modifies
 *   @n pllc PLLDIV1 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl   loadVal;
        loadVal.divControl.pllRatio = 0x08;
        ...
        CSL_pllcSetDiv1Ratio (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv1Ratio (
    CSL_PllcHandle  hPllc,
    Uint32          loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV1,PLLC_PLLDIV1_RATIO,loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv2Enable
 *
 *   @b Description
 *      Controls prescalar(DIV2) value of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV2) will be enabled / disabled.
 *
 *   @b Modifies
 *   @n pllc PLLDIV1 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl    loadVal ;
        loadVal.divControl.divEnable = CSL_PLLC_PLLDIV_ENABLE;
        ...
        CSL_pllcSetDiv2Enable (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv2Enable (
    CSL_PllcHandle      hPllc,
    CSL_PllcDivState    loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV2,PLLC_PLLDIV2_D2EN,loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv2Ratio
 *
 *   @b Description
 *      Controls the Ratio of prescalar(DIV2) of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV2) ratio will be changed.
 *
 *   @b Modifies
 *   @n pllc PLLDIV2 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl   loadVal;
        loadVal.divControl.pllRatio = 0x08;
        ...
        CSL_pllcSetDiv2Ratio (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv2Ratio (
    CSL_PllcHandle      hPllc,
    Uint32              loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV2,PLLC_PLLDIV2_RATIO,loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv3Enable
 *
 *   @b Description
 *      Controls prescalar(DIV3) value of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV3) will be enabled / disabled.
 *
 *   @b Modifies
 *   @n pllc PLLDIV3 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl    loadVal ;
        loadVal.divControl.divEnable = CSL_PLLC_PLLDIV_ENABLE;
        ...
        CSL_pllcSetDiv3Enable (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv3Enable (
    CSL_PllcHandle      hPllc,
    CSL_PllcDivState    loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV3,PLLC_PLLDIV3_D3EN,loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetDiv3Ratio
 *
 *   @b Description
 *      Controls the Ratio of prescalar(DIV3) of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc prescalar(DIV3) ratio will be changed.
 *
 *   @b Modifies
 *   @n pllc PLLDIV3 register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcDivCntrl   loadVal;
        loadVal.divControl.pllRatio = 0x08;
        ...
        CSL_pllcSetDiv3Ratio (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetDiv3Ratio (
    CSL_PllcHandle  hPllc,
    Uint32          loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->PLLDIV3,PLLC_PLLDIV3_RATIO,loadVal);

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

/** ============================================================================
 *   @n@b CSL_pllcSetAuxClkEnable
 *
 *   @b Description
 *      Controls the State of Aux Clock (Disable / Enable) of the PLL.
 * 
 *   @b Arguments
 *   @verbatim
        hPllc     	 Handle to the PLLC instance
        loadVal      Value to be loaded to pllc control/status register
     @endverbatim
 *
 *   <b> Return Value </b> 
 *       None 
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  pllc AUXClk is Enabled / Disabled.
 *
 *   @b Modifies
 *   @n pllc CKEN register.
 *
 *   @b Example
 *   @verbatim
        CSL_PllcHandle      hPllc;
        CSL_PllcClkControl  loadVal;
        loadVal.pllClkState = CSL_PLLC_CLK_ENABLE;
        ...
        CSL_pllcSetAuxClkEnable (hPllc, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_pllcSetAuxClkEnable (
    CSL_PllcHandle          hPllc,
    CSL_PllcClkState        loadVal
)
{   
	Uint32 loopCount;

	CSL_FINS (hPllc->regs->CKEN,PLLC_CKEN_AUXEN,loadVal);            

	/* Fixed time delay - waiting for the PLL to re-lock */
	loopCount = DELAY_200MS;
	while(loopCount--)
		asm("	NOP");
}

#ifdef __cplusplus
}
#endif

#endif /* _CSL_PLLCAUX_H_ */