cslr_chip.h

Configuring External Interrupts on TMS320C672x Devices

#define CSL_CHIP_AMR_BK1_4               (0x1u)
#define CSL_CHIP_AMR_BK1_8               (0x2u)
#define CSL_CHIP_AMR_BK1_16              (0x3u)
#define CSL_CHIP_AMR_BK1_32              (0x4u)
#define CSL_CHIP_AMR_BK1_64              (0x5u)
#define CSL_CHIP_AMR_BK1_128             (0x6u)
#define CSL_CHIP_AMR_BK1_256             (0x7u)
#define CSL_CHIP_AMR_BK1_512             (0x8u)
#define CSL_CHIP_AMR_BK1_1K              (0x9u)
#define CSL_CHIP_AMR_BK1_2K              (0xAu)
#define CSL_CHIP_AMR_BK1_4K              (0xBu)
#define CSL_CHIP_AMR_BK1_8K              (0xCu)
#define CSL_CHIP_AMR_BK1_16K             (0xDu)
#define CSL_CHIP_AMR_BK1_32K             (0xEu)
#define CSL_CHIP_AMR_BK1_64K             (0xFu)
#define CSL_CHIP_AMR_BK1_128K            (0x10u)
#define CSL_CHIP_AMR_BK1_256K            (0x11u)
#define CSL_CHIP_AMR_BK1_512K            (0x12u)
#define CSL_CHIP_AMR_BK1_1M              (0x13u)
#define CSL_CHIP_AMR_BK1_2M              (0x14u)
#define CSL_CHIP_AMR_BK1_4M              (0x15u)
#define CSL_CHIP_AMR_BK1_8M              (0x16u)
#define CSL_CHIP_AMR_BK1_16M             (0x17u)
#define CSL_CHIP_AMR_BK1_32M             (0x18u)
#define CSL_CHIP_AMR_BK1_64M             (0x19u)
#define CSL_CHIP_AMR_BK1_128M            (0x1Au)
#define CSL_CHIP_AMR_BK1_256M            (0x1Bu)
#define CSL_CHIP_AMR_BK1_512M            (0x1Cu)
#define CSL_CHIP_AMR_BK1_1G              (0x1Du)
#define CSL_CHIP_AMR_BK1_2G              (0x1Eu)
#define CSL_CHIP_AMR_BK1_4G              (0x1Fu)

#define CSL_CHIP_AMR_BK0_MASK            (0x1F0000u)
#define CSL_CHIP_AMR_BK0_SHIFT           (0x10u)
#define CSL_CHIP_AMR_BK0_RESETVAL        (0x0u)

/*----BK0 Tokens----*/
#define CSL_CHIP_AMR_BK0_2               (0x0u)
#define CSL_CHIP_AMR_BK0_4               (0x1u)
#define CSL_CHIP_AMR_BK0_8               (0x2u)
#define CSL_CHIP_AMR_BK0_16              (0x3u)
#define CSL_CHIP_AMR_BK0_32              (0x4u)
#define CSL_CHIP_AMR_BK0_64              (0x5u)
#define CSL_CHIP_AMR_BK0_128             (0x6u)
#define CSL_CHIP_AMR_BK0_256             (0x7u)
#define CSL_CHIP_AMR_BK0_512             (0x8u)
#define CSL_CHIP_AMR_BK0_1K              (0x9u)
#define CSL_CHIP_AMR_BK0_2K              (0xAu)
#define CSL_CHIP_AMR_BK0_4K              (0xBu)
#define CSL_CHIP_AMR_BK0_8K              (0xCu)
#define CSL_CHIP_AMR_BK0_16K             (0xDu)
#define CSL_CHIP_AMR_BK0_32K             (0xEu)
#define CSL_CHIP_AMR_BK0_64K             (0xFu)
#define CSL_CHIP_AMR_BK0_128K            (0x10u)
#define CSL_CHIP_AMR_BK0_256K            (0x11u)
#define CSL_CHIP_AMR_BK0_512K            (0x12u)
#define CSL_CHIP_AMR_BK0_1M              (0x13u)
#define CSL_CHIP_AMR_BK0_2M              (0x14u)
#define CSL_CHIP_AMR_BK0_4M              (0x15u)
#define CSL_CHIP_AMR_BK0_8M              (0x16u)
#define CSL_CHIP_AMR_BK0_16M             (0x17u)
#define CSL_CHIP_AMR_BK0_32M             (0x18u)
#define CSL_CHIP_AMR_BK0_64M             (0x19u)
#define CSL_CHIP_AMR_BK0_128M            (0x1Au)
#define CSL_CHIP_AMR_BK0_256M            (0x1Bu)
#define CSL_CHIP_AMR_BK0_512M            (0x1Cu)
#define CSL_CHIP_AMR_BK0_1G              (0x1Du)
#define CSL_CHIP_AMR_BK0_2G              (0x1Eu)
#define CSL_CHIP_AMR_BK0_4G              (0x1Fu)

#define CSL_CHIP_AMR_B7MODE_MASK         (0xC000u)
#define CSL_CHIP_AMR_B7MODE_SHIFT        (0xEu)
#define CSL_CHIP_AMR_B7MODE_RESETVAL     (0x0u)

/*----B7MODE Tokens----*/
#define CSL_CHIP_AMR_B7MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_B7MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_B7MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_B6MODE_MASK         (0x3000u)
#define CSL_CHIP_AMR_B6MODE_SHIFT        (0xCu)
#define CSL_CHIP_AMR_B6MODE_RESETVAL     (0x0u)

/*----B6MODE Tokens----*/
#define CSL_CHIP_AMR_B6MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_B6MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_B6MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_B5MODE_MASK         (0xC00u)
#define CSL_CHIP_AMR_B5MODE_SHIFT        (0xAu)
#define CSL_CHIP_AMR_B5MODE_RESETVAL     (0x0u)

/*----B5MODE Tokens----*/
#define CSL_CHIP_AMR_B5MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_B5MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_B5MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_B4MODE_MASK         (0x300u)
#define CSL_CHIP_AMR_B4MODE_SHIFT        (0x8u)
#define CSL_CHIP_AMR_B4MODE_RESETVAL     (0x0u)

/*----B4MODE Tokens----*/
#define CSL_CHIP_AMR_B4MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_B4MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_B4MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_A7MODE_MASK         (0xC0u)
#define CSL_CHIP_AMR_A7MODE_SHIFT        (0x6u)
#define CSL_CHIP_AMR_A7MODE_RESETVAL     (0x0u)

/*----A7MODE Tokens----*/
#define CSL_CHIP_AMR_A7MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_A7MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_A7MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_A6MODE_MASK         (0x30u)
#define CSL_CHIP_AMR_A6MODE_SHIFT        (0x4u)
#define CSL_CHIP_AMR_A6MODE_RESETVAL     (0x0u)

/*----A6MODE Tokens----*/
#define CSL_CHIP_AMR_A6MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_A6MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_A6MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_A5MODE_MASK         (0xCu)
#define CSL_CHIP_AMR_A5MODE_SHIFT        (0x2u)
#define CSL_CHIP_AMR_A5MODE_RESETVAL     (0x0u)

/*----A5MODE Tokens----*/
#define CSL_CHIP_AMR_A5MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_A5MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_A5MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_A4MODE_MASK         (0x3u)
#define CSL_CHIP_AMR_A4MODE_SHIFT        (0x0u)
#define CSL_CHIP_AMR_A4MODE_RESETVAL     (0x0u)

/*----A4MODE Tokens----*/
#define CSL_CHIP_AMR_A4MODE_LINEAR       (0x0u)
#define CSL_CHIP_AMR_A4MODE_CIRCULAR0    (0x1u)
#define CSL_CHIP_AMR_A4MODE_CIRCULAR1    (0x2u)

#define CSL_CHIP_AMR_RESETVAL            (0x0u)

/* CSR */

#define CSL_CHIP_CSR_CPUID_MASK          (0xFF000000u)
#define CSL_CHIP_CSR_CPUID_SHIFT         (0x18u)
#define CSL_CHIP_CSR_CPUID_RESETVAL      (0x0u)

#define CSL_CHIP_CSR_REVISIONID_MASK     (0xFF0000u)
#define CSL_CHIP_CSR_REVISIONID_SHIFT    (0x10u)
#define CSL_CHIP_CSR_REVISIONID_RESETVAL (0x0u)

#define CSL_CHIP_CSR_PWRD_MASK           (0xFC00u)
#define CSL_CHIP_CSR_PWRD_SHIFT          (0xAu)
#define CSL_CHIP_CSR_PWRD_RESETVAL       (0x0u)

#define CSL_CHIP_CSR_SAT_MASK            (0x200u)
#define CSL_CHIP_CSR_SAT_SHIFT           (0x9u)
#define CSL_CHIP_CSR_SAT_RESETVAL        (0x0u)

/*----SAT Tokens----*/
#define CSL_CHIP_CSR_SAT_CLR             (0x0u)
#define CSL_CHIP_CSR_SAT_SET             (0x1u)

#define CSL_CHIP_CSR_EN_MASK             (0x100u)
#define CSL_CHIP_CSR_EN_SHIFT            (0x8u)
#define CSL_CHIP_CSR_EN_RESETVAL         (0x1u)

/*----EN Tokens----*/
#define CSL_CHIP_CSR_EN_LITTLE           (0x1u)

#define CSL_CHIP_CSR_PCC_MASK            (0xE0u)
#define CSL_CHIP_CSR_PCC_SHIFT           (0x5u)
#define CSL_CHIP_CSR_PCC_RESETVAL        (0x0u)

/*----PCC Tokens----*/
#define CSL_CHIP_CSR_PCC_CACHE_EN        (0x2u)
#define CSL_CHIP_CSR_PCC_CACHE_FREEZE    (0x3u)
#define CSL_CHIP_CSR_PCC_CACHE_BYPASS    (0x4u)

#define CSL_CHIP_CSR_DCC_MASK            (0x1Cu)
#define CSL_CHIP_CSR_DCC_SHIFT           (0x2u)
#define CSL_CHIP_CSR_DCC_RESETVAL        (0x0u)

#define CSL_CHIP_CSR_PGIE_MASK           (0x2u)
#define CSL_CHIP_CSR_PGIE_SHIFT          (0x1u)
#define CSL_CHIP_CSR_PGIE_RESETVAL       (0x0u)

/*----PGIE Tokens----*/
#define CSL_CHIP_CSR_PGIE_DISABLE        (0x0u)
#define CSL_CHIP_CSR_PGIE_ENABLE         (0x1u)

#define CSL_CHIP_CSR_GIE_MASK            (0x1u)
#define CSL_CHIP_CSR_GIE_SHIFT           (0x0u)
#define CSL_CHIP_CSR_GIE_RESETVAL        (0x0u)

/*----GIE Tokens----*/
#define CSL_CHIP_CSR_GIE_DISABLE         (0x0u)
#define CSL_CHIP_CSR_GIE_ENABLE          (0x1u)

#define CSL_CHIP_CSR_RESETVAL            (0x100u)

/* FADCR */

#define CSL_CHIP_FADCR_L2RMODE_MASK      (0x6000000u)
#define CSL_CHIP_FADCR_L2RMODE_SHIFT     (0x19u)
#define CSL_CHIP_FADCR_L2RMODE_RESETVAL  (0x0u)

/*----L2RMODE Tokens----*/
#define CSL_CHIP_FADCR_L2RMODE_RTOFP     (0x0u)
#define CSL_CHIP_FADCR_L2RMODE_RTOZERO   (0x1u)
#define CSL_CHIP_FADCR_L2RMODE_RTOINF    (0x2u)
#define CSL_CHIP_FADCR_L2RMODE_RTONEGINF (0x3u)

#define CSL_CHIP_FADCR_L2UNDER_MASK      (0x1000000u)
#define CSL_CHIP_FADCR_L2UNDER_SHIFT     (0x18u)
#define CSL_CHIP_FADCR_L2UNDER_RESETVAL  (0x0u)

/*----L2UNDER Tokens----*/
#define CSL_CHIP_FADCR_L2UNDER_NO_UDRFLW (0x0u)
#define CSL_CHIP_FADCR_L2UNDER_UDRFLW    (0x1u)

#define CSL_CHIP_FADCR_L2INEX_MASK       (0x800000u)
#define CSL_CHIP_FADCR_L2INEX_SHIFT      (0x17u)
#define CSL_CHIP_FADCR_L2INEX_RESETVAL   (0x0u)

/*----L2INEX Tokens----*/
#define CSL_CHIP_FADCR_L2INEX_CLR        (0x0u)
#define CSL_CHIP_FADCR_L2INEX_SET        (0x1u)

#define CSL_CHIP_FADCR_L2OVER_MASK       (0x400000u)
#define CSL_CHIP_FADCR_L2OVER_SHIFT      (0x16u)
#define CSL_CHIP_FADCR_L2OVER_RESETVAL   (0x0u)

/*----L2OVER Tokens----*/
#define CSL_CHIP_FADCR_L2OVER_NO_OVRFLW  (0x0u)
#define CSL_CHIP_FADCR_L2OVER_OVRFLW     (0x1u)

#define CSL_CHIP_FADCR_L2INFO_MASK       (0x200000u)
#define CSL_CHIP_FADCR_L2INFO_SHIFT      (0x15u)
#define CSL_CHIP_FADCR_L2INFO_RESETVAL   (0x0u)

/*----L2INFO Tokens----*/
#define CSL_CHIP_FADCR_L2INFO_NO_SIGNINF (0x0u)
#define CSL_CHIP_FADCR_L2INFO_SIGNINF    (0x1u)

#define CSL_CHIP_FADCR_L2INVAL_MASK      (0x100000u)
#define CSL_CHIP_FADCR_L2INVAL_SHIFT     (0x14u)
#define CSL_CHIP_FADCR_L2INVAL_RESETVAL  (0x0u)

/*----L2INVAL Tokens----*/
#define CSL_CHIP_FADCR_L2INVAL_NAN_NOSRC (0x0u)
#define CSL_CHIP_FADCR_L2INVAL_NAN_SRC   (0x1u)

#define CSL_CHIP_FADCR_L2DEN2_MASK       (0x80000u)
#define CSL_CHIP_FADCR_L2DEN2_SHIFT      (0x13u)
#define CSL_CHIP_FADCR_L2DEN2_RESETVAL   (0x0u)

/*----L2DEN2 Tokens----*/
#define CSL_CHIP_FADCR_L2DEN2_SRC2_NODNORM (0x0u)
#define CSL_CHIP_FADCR_L2DEN2_SRC2_DNORM (0x1u)

#define CSL_CHIP_FADCR_L2DEN1_MASK       (0x40000u)
#define CSL_CHIP_FADCR_L2DEN1_SHIFT      (0x12u)
#define CSL_CHIP_FADCR_L2DEN1_RESETVAL   (0x0u)

/*----L2DEN1 Tokens----*/
#define CSL_CHIP_FADCR_L2DEN1_SRC1_NODNORM (0x0u)
#define CSL_CHIP_FADCR_L2DEN1_SRC1_DNORM (0x1u)

#define CSL_CHIP_FADCR_L2NAN2_MASK       (0x20000u)
#define CSL_CHIP_FADCR_L2NAN2_SHIFT      (0x11u)
#define CSL_CHIP_FADCR_L2NAN2_RESETVAL   (0x0u)

/*----L2NAN2 Tokens----*/
#define CSL_CHIP_FADCR_L2NAN2_SRC2_NONAN (0x0u)
#define CSL_CHIP_FADCR_L2NAN2_SRC2_NAN   (0x1u)

#define CSL_CHIP_FADCR_L2NAN1_MASK       (0x10000u)
#define CSL_CHIP_FADCR_L2NAN1_SHIFT      (0x10u)
#define CSL_CHIP_FADCR_L2NAN1_RESETVAL   (0x0u)

/*----L2NAN1 Tokens----*/
#define CSL_CHIP_FADCR_L2NAN1_SRC1_NONAN (0x0u)
#define CSL_CHIP_FADCR_L2NAN1_SRC1_NAN   (0x1u)

#define CSL_CHIP_FADCR_L1RMODE_MASK      (0x600u)
#define CSL_CHIP_FADCR_L1RMODE_SHIFT     (0x9u)
#define CSL_CHIP_FADCR_L1RMODE_RESETVAL  (0x0u)

/*----L1RMODE Tokens----*/
#define CSL_CHIP_FADCR_L1RMODE_RTOFP     (0x0u)
#define CSL_CHIP_FADCR_L1RMODE_RTOZERO   (0x1u)
#define CSL_CHIP_FADCR_L1RMODE_RTOINF    (0x2u)
#define CSL_CHIP_FADCR_L1RMODE_RTONEGINF (0x3u)

#define CSL_CHIP_FADCR_L1UNDER_MASK      (0x100u)
#define CSL_CHIP_FADCR_L1UNDER_SHIFT     (0x8u)
#define CSL_CHIP_FADCR_L1UNDER_RESETVAL  (0x0u)

/*----L1UNDER Tokens----*/
#define CSL_CHIP_FADCR_L1UNDER_NO_UDRFLW (0x0u)
#define CSL_CHIP_FADCR_L1UNDER_UDRFLW    (0x1u)

#define CSL_CHIP_FADCR_L1INEX_MASK       (0x80u)
#define CSL_CHIP_FADCR_L1INEX_SHIFT      (0x7u)
#define CSL_CHIP_FADCR_L1INEX_RESETVAL   (0x0u)

/*----L1INEX Tokens----*/
#define CSL_CHIP_FADCR_L1INEX_CLR        (0x0u)
#define CSL_CHIP_FADCR_L1INEX_SET        (0x1u)

#define CSL_CHIP_FADCR_L1OVER_MASK       (0x40u)
#define CSL_CHIP_FADCR_L1OVER_SHIFT      (0x6u)
#define CSL_CHIP_FADCR_L1OVER_RESETVAL   (0x0u)

/*----L1OVER Tokens----*/
#define CSL_CHIP_FADCR_L1OVER_NO_OVRFLW  (0x0u)
#define CSL_CHIP_FADCR_L1OVER_OVRFLW     (0x1u)

#define CSL_CHIP_FADCR_L1INFO_MASK       (0x20u)
#define CSL_CHIP_FADCR_L1INFO_SHIFT      (0x5u)
#define CSL_CHIP_FADCR_L1INFO_RESETVAL   (0x0u)

/*----L1INFO Tokens----*/
#define CSL_CHIP_FADCR_L1INFO_NO_SIGNINF (0x0u)
#define CSL_CHIP_FADCR_L1INFO_SIGNINF    (0x1u)

#define CSL_CHIP_FADCR_L1INVAL_MASK      (0x10u)
#define CSL_CHIP_FADCR_L1INVAL_SHIFT     (0x4u)
#define CSL_CHIP_FADCR_L1INVAL_RESETVAL  (0x0u)

/*----L1INVAL Tokens----*/
#define CSL_CHIP_FADCR_L1INVAL_NAN_NOSRC (0x0u)
#define CSL_CHIP_FADCR_L1INVAL_NAN_SRC   (0x1u)

#define CSL_CHIP_FADCR_L1DEN2_MASK       (0x8u)
#define CSL_CHIP_FADCR_L1DEN2_SHIFT      (0x3u)
#define CSL_CHIP_FADCR_L1DEN2_RESETVAL   (0x0u)

/*----L1DEN2 Tokens----*/
#define CSL_CHIP_FADCR_L1DEN2_SRC2_NODNORM (0x0u)
#define CSL_CHIP_FADCR_L1DEN2_SRC2_DNORM (0x1u)

#define CSL_CHIP_FADCR_L1DEN1_MASK       (0x4u)
#define CSL_CHIP_FADCR_L1DEN1_SHIFT      (0x2u)
#define CSL_CHIP_FADCR_L1DEN1_RESETVAL   (0x0u)

/*----L1DEN1 Tokens----*/
#define CSL_CHIP_FADCR_L1DEN1_SRC1_NODNORM (0x0u)
#define CSL_CHIP_FADCR_L1DEN1_SRC1_DNORM (0x1u)

#define CSL_CHIP_FADCR_L1NAN2_MASK       (0x2u)
#define CSL_CHIP_FADCR_L1NAN2_SHIFT      (0x1u)
#define CSL_CHIP_FADCR_L1NAN2_RESETVAL   (0x0u)

/*----L1NAN2 Tokens----*/
#define CSL_CHIP_FADCR_L1NAN2_SRC2_NONAN (0x0u)
#define CSL_CHIP_FADCR_L1NAN2_SRC2_NAN   (0x1u)