ip2k.h

gcc-you can use this code to learn something about gcc, and inquire further into linux,

   If you don't define this macro, the default is `"long int"'.  */

#undef WCHAR_TYPE
#define WCHAR_TYPE "int"
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE	16
/* A C expression for the size in bits of the data type for wide
   characters.  This is used in `cpp', which cannot make use of
   `WCHAR_TYPE'.  */

#define HARD_REG_SIZE           (UNITS_PER_WORD)
/* Standard register usage.

   for the IP2K, we are going to have a LOT of registers, but only some of them
   are named.  */
 
#define FIRST_PSEUDO_REGISTER (0x104) /* Skip over physical regs, VFP, AP.  */

/* Number of hardware registers known to the compiler.  They receive
   numbers 0 through `FIRST_PSEUDO_REGISTER-1'; thus, the first
   pseudo register's number really is assigned the number
   `FIRST_PSEUDO_REGISTER'.  */

#define REG_IP		0x4
#define REG_IPH		REG_IP
#define REG_IPL		0x5

#define REG_SP		0x6
#define REG_SPH		REG_SP
#define REG_SPL		0x7

#define REG_PCH		0x8
#define REG_PCL		0x9

#define REG_W		0xa
#define REG_STATUS	0xb

#define REG_DP		0xc
#define REG_DPH		REG_DP
#define REG_DPL		0xd

#define REG_MULH	0xf

#define REG_CALLH	0x7e		/* Call-stack readout.  */
#define REG_CALLL	0x7f


#define REG_RESULT	0x80	/* Result register (upto 8 bytes).  */
#define REG_FP		0xfd	/* 2 bytes for FRAME chain  */

#define REG_ZERO	0xff	/* Initialized to zero by runtime.  */

#define REG_VFP		0x100	/* Virtual frame pointer.  */
#define REG_AP		0x102	/* Virtual arg pointer.  */

/* Status register bits.  */
#define Z_FLAG	0x2	 
#define DC_FLAG	0x1
#define C_FLAG	0x0

#define FIXED_REGISTERS {\
1,1,1,1,0,0,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/*r128..r159*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
1,1,1,1}

/* An initializer that says which registers are used for fixed
   purposes all throughout the compiled code and are therefore not
   available for general allocation.  These would include the stack
   pointer, the frame pointer (except on machines where that can be
   used as a general register when no frame pointer is needed), the
   program counter on machines where that is considered one of the
   addressable registers, and any other numbered register with a
   standard use.

   This information is expressed as a sequence of numbers, separated
   by commas and surrounded by braces.  The Nth number is 1 if
   register N is fixed, 0 otherwise.

   The table initialized from this macro, and the table initialized by
   the following one, may be overridden at run time either
   automatically, by the actions of the macro
   `CONDITIONAL_REGISTER_USAGE', or by the user with the command
   options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'.  */

#define CALL_USED_REGISTERS {			\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r128..r159*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
1,1,1,1}

/* Like `FIXED_REGISTERS' but has 1 for each register that is
   clobbered (in general) by function calls as well as for fixed
   registers.  This macro therefore identifies the registers that are
   not available for general allocation of values that must live
   across function calls.

   If a register has 0 in `CALL_USED_REGISTERS', the compiler
   automatically saves it on function entry and restores it on
   function exit, if the register is used within the function.  */

#define NON_SAVING_SETJMP 0
/* If this macro is defined and has a nonzero value, it means that
   `setjmp' and related functions fail to save the registers, or that
   `longjmp' fails to restore them.  To compensate, the compiler
   avoids putting variables in registers in functions that use
   `setjmp'.  */

#define REG_ALLOC_ORDER {			\
    0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f,	\
    0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,	\
    0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,	\
    0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,	\
    0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7,	\
    0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf,	\
    0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7,	\
    0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf,	\
    0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,	\
    0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf,	\
    0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd7,	\
    0xd8,0xd9,0xda,0xdb,0xdc,0xdd,0xde,0xdf,	\
    0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,	\
    0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,	\
    0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,	\
    0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,	\
    0x00,0x01,0x02,0x03,0x0c,0x0d,0x06,0x07,	\
    0x08,0x09,0x0a,0x0b,0x04,0x05,0x0e,0x0f,	\
    0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,	\
    0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,	\
    0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,	\
    0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,	\
    0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,	\
    0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,	\
    0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,	\
    0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,	\
    0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,	\
    0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f,	\
    0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,	\
    0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f,	\
    0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,	\
    0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,	\
    0x100,0x101,0x102,0x103}

/* If defined, an initializer for a vector of integers, containing the
   numbers of hard registers in the order in which GNU CC should
   prefer to use them (from most preferred to least).
   
   If this macro is not defined, registers are used lowest numbered
   first (all else being equal).
   
   One use of this macro is on machines where the highest numbered
   registers must always be saved and the save-multiple-registers
   instruction supports only sequences of consecutive registers.  On
   such machines, define `REG_ALLOC_ORDER' to be an initializer that
   lists the highest numbered allocatable register first.  */

#define ORDER_REGS_FOR_LOCAL_ALLOC ip2k_init_local_alloc (reg_alloc_order)
/* A C statement (sans semicolon) to choose the order in which to
   allocate hard registers for pseudo-registers local to a basic
   block.

   Store the desired register order in the array `reg_alloc_order'.
   Element 0 should be the register to allocate first; element 1, the
   next register; and so on.

   The macro body should not assume anything about the contents of
   `reg_alloc_order' before execution of the macro.

   On most machines, it is not necessary to define this macro.  */

/* Are we allowed to rename registers?  For some reason, regrename was
   changing DP to IP (when it appeared in addresses like (plus:HI
   (reg: DP) (const_int 37)) - and that's bad because IP doesn't
   permit offsets!  */

#define HARD_REGNO_RENAME_OK(REG, NREG)				\
  (((REG) == REG_DPH) ? 0					\
    : ((REG) == REG_IPH) ? ((NREG) == REG_DPH)			\
    : (((NREG) == REG_IPL) || ((NREG) == REG_DPL)) ? 0 : 1)

#define HARD_REGNO_NREGS(REGNO, MODE) \
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

/* A C expression for the number of consecutive hard registers,
   starting at register number REGNO, required to hold a value of mode
   MODE.

   On a machine where all registers are exactly one word, a suitable
   definition of this macro is

   #define HARD_REGNO_NREGS(REGNO, MODE)            \
   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \
   / UNITS_PER_WORD))  */

#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
/* A C expression that is nonzero if it is permissible to store a
   value of mode MODE in hard register number REGNO (or in several
   registers starting with that one).  For a machine where all
   registers are equivalent, a suitable definition is

   #define HARD_REGNO_MODE_OK(REGNO, MODE) 1

   It is not necessary for this macro to check for the numbers of
   fixed registers, because the allocation mechanism considers them
   to be always occupied.

   On some machines, double-precision values must be kept in even/odd
   register pairs.  The way to implement that is to define this macro
   to reject odd register numbers for such modes.

   The minimum requirement for a mode to be OK in a register is that
   the `movMODE' instruction pattern support moves between the
   register and any other hard register for which the mode is OK; and
   that moving a value into the register and back out not alter it.

   Since the same instruction used to move `SImode' will work for all
   narrower integer modes, it is not necessary on any machine for
   `HARD_REGNO_MODE_OK' to distinguish between these modes, provided
   you define patterns `movhi', etc., to take advantage of this.  This
   is useful because of the interaction between `HARD_REGNO_MODE_OK'
   and `MODES_TIEABLE_P'; it is very desirable for all integer modes
   to be tieable.

   Many machines have special registers for floating point arithmetic.
   Often people assume that floating point machine modes are allowed
   only in floating point registers.  This is not true.  Any
   registers that can hold integers can safely *hold* a floating
   point machine mode, whether or not floating arithmetic can be done
   on it in those registers.  Integer move instructions can be used
   to move the values.

   On some machines, though, the converse is true: fixed-point machine
   modes may not go in floating registers.  This is true if the
   floating registers normalize any value stored in them, because
   storing a non-floating value there would garble it.  In this case,
   `HARD_REGNO_MODE_OK' should reject fixed-point machine modes in
   floating registers.  But if the floating registers do not
   automatically normalize, if you can store any bit pattern in one
   and retrieve it unchanged without a trap, then any machine mode
   may go in a floating register, so you can define this macro to say
   so.

   The primary significance of special floating registers is rather
   that they are the registers acceptable in floating point arithmetic
   instructions.  However, this is of no concern to
   `HARD_REGNO_MODE_OK'.  You handle it by writing the proper
   constraints for those instructions.

   On some machines, the floating registers are especially slow to
   access, so that it is better to store a value in a stack frame
   than in such a register if floating point arithmetic is not being
   done.  As long as the floating registers are not in class
   `GENERAL_REGS', they will not be used unless some pattern's
   constraint asks for one.  */

#define MODES_TIEABLE_P(MODE1, MODE2)		\
   (((MODE1) == QImode && (MODE2) == HImode)	\
    || ((MODE2) == QImode && (MODE1) == HImode))
/* We originally had this as follows - this isn't a win on the IP2k
   though as registers just get in our way!
   
   #define MODES_TIEABLE_P(MODE1, MODE2) \
    (((MODE1) > HImode && (MODE2) == HImode)
     || ((MODE1) == HImode && (MODE2) > HImode))  */

/* A C expression that is nonzero if it is desirable to choose
   register allocation so as to avoid move instructions between a
   value of mode MODE1 and a value of mode MODE2.

   If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
   MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
   MODE2)' must be zero.  */

enum reg_class {
  NO_REGS,
  DPH_REGS,
  DPL_REGS,
  DP_REGS,
  SP_REGS,
  IPH_REGS,
  IPL_REGS,
  IP_REGS,
  DP_SP_REGS,
  PTR_REGS,
  NONPTR_REGS,
  NONSP_REGS,
  GENERAL_REGS,
  ALL_REGS = GENERAL_REGS,
  LIM_REG_CLASSES
};

/* An enumeral type that must be defined with all the register class