m68hc11.h

gcc-you can use this code to learn something about gcc, and inquire further into linux,

/* see PUSH_POP_ADDRESS_P() below for an explanation of this.  */
#define IS_STACK_PUSH(operand) \
    ((GET_CODE (operand) == MEM) \
     && (GET_CODE (XEXP (operand, 0)) == PRE_DEC) \
     && (SP_REG_P (XEXP (XEXP (operand, 0), 0))))

#define IS_STACK_POP(operand) \
    ((GET_CODE (operand) == MEM) \
     && (GET_CODE (XEXP (operand, 0)) == POST_INC) \
     && (SP_REG_P (XEXP (XEXP (operand, 0), 0))))

/* 1 if X is an rtx for a constant that is a valid address.  */
#define CONSTANT_ADDRESS_P(X)	(CONSTANT_P (X))

/* Maximum number of registers that can appear in a valid memory address */
#define MAX_REGS_PER_ADDRESS	2

/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
   valid memory address for an instruction. The MODE argument is the
   machine mode for the MEM expression that wants to use this address.  */

/*--------------------------------------------------------------
   Valid addresses are either direct or indirect (MEM) versions
   of the following forms:
	constant		N
	register		,X
	indexed			N,X
--------------------------------------------------------------*/

/* The range of index that is allowed by indirect addressing.  */

#define VALID_MIN_OFFSET m68hc11_min_offset
#define VALID_MAX_OFFSET m68hc11_max_offset

/* The offset values which are allowed by the n,x and n,y addressing modes.
   Take into account the size of the mode because we may have to add
   a mode offset to access the lowest part of the data.
   (For example, for an SImode, the last valid offset is 252.) */
#define VALID_CONSTANT_OFFSET_P(X,MODE)		\
(((GET_CODE (X) == CONST_INT) &&			\
  ((INTVAL (X) >= VALID_MIN_OFFSET)		\
     && ((INTVAL (X) <= VALID_MAX_OFFSET		\
		- (HOST_WIDE_INT) (GET_MODE_SIZE (MODE) + 1))))) \
|| (TARGET_M6812 \
    && ((GET_CODE (X) == SYMBOL_REF) \
        || GET_CODE (X) == LABEL_REF \
        || GET_CODE (X) == CONST)))

/* This is included to allow stack push/pop operations. Special hacks in the
   md and m6811.c files exist to support this.  */
#define PUSH_POP_ADDRESS_P(X) \
  (((GET_CODE (X) == PRE_DEC) || (GET_CODE (X) == POST_INC)) \
	&& SP_REG_P (XEXP (X, 0)))

/* Go to ADDR if X is a valid address.  */
#ifndef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
  if (m68hc11_go_if_legitimate_address ((X), (MODE), 0)) goto ADDR; \
}
#else
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)		 \
{							 \
  if (m68hc11_go_if_legitimate_address ((X), (MODE), 1)) goto ADDR; \
}
#endif

/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its
   validity for a certain class.  We have two alternate definitions for each
   of them.  The usual definition accepts all pseudo regs; the other rejects
   them unless they have been allocated suitable hard regs.  The symbol
   REG_OK_STRICT causes the latter definition to be used.
  
   Most source files want to accept pseudo regs in the hope that they will
   get allocated to the class that the insn wants them to be in. Source files
   for reload pass need to be strict. After reload, it makes no difference,
   since pseudo regs have been eliminated by then.  */

#ifndef REG_OK_STRICT
/* Nonzero if X is a hard reg that can be used as a base reg.  */
#define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P(X)

/* Nonzero if X is a hard reg that can be used as an index.  */
#define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_NONSTRICT_P(X)
#else
#define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_STRICT_P(X)
#define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_STRICT_P(X)
#endif


/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.
  
   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.
  
   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.
  
   It is always safe for this macro to do nothing.
   It exists to recognize opportunities to optimize the output.  */

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)                     \
{ rtx operand = (X);                                            \
  if (m68hc11_legitimize_address (&operand, (OLDX), (MODE)))	\
    {                                                           \
      (X) = operand;                                            \
      GO_IF_LEGITIMATE_ADDRESS (MODE,X,WIN);                    \
    }                                                           \
}

/* Go to LABEL if ADDR (a legitimate address expression)
   has an effect that depends on the machine mode it is used for.  */
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)  \
{									\
  if (GET_CODE (ADDR) == PRE_DEC || GET_CODE (ADDR) == POST_DEC		\
      || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC)	\
    goto LABEL;								\
}

/* Nonzero if the constant value X is a legitimate general operand.
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */

#define LEGITIMATE_CONSTANT_P(X)	1


/* Tell final.c how to eliminate redundant test instructions.  */

#define NOTICE_UPDATE_CC(EXP, INSN) \
	m68hc11_notice_update_cc ((EXP), (INSN))

/* Compute the cost of computing a constant rtl expression RTX whose rtx-code
   is CODE.  The body of this macro is a portion of a switch statement.  If
   the code is computed here, return it with a return statement.  Otherwise,
   break from the switch.

   Constants are cheap.  Moving them in registers must be avoided
   because most instructions do not handle two register operands.  */
#define CONST_COSTS(RTX,CODE,OUTER_CODE)			\
 case CONST_INT:						\
     /* Logical and arithmetic operations with a constant  */	\
     /* operand are better because they are not supported  */	\
     /* with two registers.  */					\
     /* 'clr' is slow */					\
   if ((OUTER_CODE) == SET && (RTX) == const0_rtx)		\
     /* After reload, the reload_cse pass checks the cost */    \
     /* to change a SET into a PLUS.  Make const0 cheap.  */    \
     return 1 - reload_completed;				\
   else								\
     return 0;							\
 case CONST:							\
 case LABEL_REF:						\
 case SYMBOL_REF:						\
   if ((OUTER_CODE) == SET)					\
      return 1 - reload_completed;				\
   return 0;							\
 case CONST_DOUBLE:						\
   return 0;

#define RTX_COSTS(X,CODE,OUTER_CODE)				\
 case ROTATE:							\
 case ROTATERT:							\
 case ASHIFT:							\
 case LSHIFTRT:							\
 case ASHIFTRT:							\
 case MINUS:							\
 case PLUS:							\
 case AND:							\
 case XOR:							\
 case IOR:							\
 case UDIV:							\
 case DIV:							\
 case MOD:							\
 case MULT:							\
 case NEG:							\
 case SIGN_EXTEND:						\
 case NOT:							\
 case COMPARE:							\
 case ZERO_EXTEND:						\
 case IF_THEN_ELSE:						\
   return m68hc11_rtx_costs (X, CODE, OUTER_CODE);

/* An expression giving the cost of an addressing mode that contains
   ADDRESS.  If not defined, the cost is computed from the ADDRESS
   expression and the `CONST_COSTS' values.  */

#define ADDRESS_COST(RTX) m68hc11_address_cost (RTX)

/* Move costs between classes of registers */
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)	\
    (m68hc11_register_move_cost (MODE, CLASS1, CLASS2))

/* Move cost between register and memory.
    - Move to a 16-bit register is reasonable,
    - Move to a soft register can be expensive.  */
#define MEMORY_MOVE_COST(MODE,CLASS,IN)		\
    m68hc11_memory_move_cost ((MODE),(CLASS),(IN))

/* A C expression for the cost of a branch instruction.  A value of 1
   is the default; other values are interpreted relative to that.

   Pretend branches are cheap because GCC generates sub-optimal code
   for the default value.  */
#define BRANCH_COST 0

/* Nonzero if access to memory by bytes is slow and undesirable.  */
#define SLOW_BYTE_ACCESS	0

/* It is as good to call a constant function address as to call an address
   kept in a register.  */
#define NO_FUNCTION_CSE

/* Try a machine-dependent way of reloading an illegitimate address
   operand.  If we find one, push the reload and jump to WIN.  This
   macro is used in only one place: `find_reloads_address' in reload.c.

   For M68HC11, we handle large displacements of a base register
   by splitting the addend accors an addhi3 insn.

   For M68HC12, the 64K offset range is available.
   */

#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN)     \
do {                                                                    \
  /* We must recognize output that we have already generated ourselves.  */ \
  if (GET_CODE (X) == PLUS						\
      && GET_CODE (XEXP (X, 0)) == PLUS					\
      && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG			\
      && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT			\
      && GET_CODE (XEXP (X, 1)) == CONST_INT)				\
    {									\
      push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL,           \
                   BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0,        \
                   OPNUM, TYPE);                                        \
      goto WIN;                                                         \
    }									\
  if (GET_CODE (X) == PLUS                                              \
      && GET_CODE (XEXP (X, 0)) == REG                                  \
      && GET_CODE (XEXP (X, 1)) == CONST_INT				\
      && !VALID_CONSTANT_OFFSET_P (XEXP (X, 1), MODE))                  \
    {                                                                   \
      HOST_WIDE_INT val = INTVAL (XEXP (X, 1));                         \
      HOST_WIDE_INT low, high;                                          \
      high = val & (~0x0FF);                                            \
      low  = val & 0x00FF;                                              \
      if (low >= 256-15) { high += 16; low -= 16; }                     \
      /* Reload the high part into a base reg; leave the low part       \
         in the mem directly.  */                                       \
                                                                        \
      X = gen_rtx_PLUS (Pmode,						\
                        gen_rtx_PLUS (Pmode, XEXP (X, 0),		\
                                      GEN_INT (high)),                  \
                        GEN_INT (low));                                 \
                                                                        \
      push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL,           \
                   BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0,        \
                   OPNUM, TYPE);                                        \
      goto WIN;                                                         \
    }                                                                   \
} while (0)


/* Defining the Output Assembler Language.  */

/* A default list of other sections which we might be "in" at any given
   time.  For targets that use additional sections (e.g. .tdesc) you
   should override this definition in the target-specific file which
   includes this file.  */

/* Output before read-only data.  */
#define TEXT_SECTION_ASM_OP	("\t.sect\t.text")

/* Output before writable data.  */
#define DATA_SECTION_ASM_OP	("\t.sect\t.data")

/* Output before uninitialized data.  */
#define BSS_SECTION_ASM_OP 	("\t.sect\t.bss")

/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.

   Same as config/elfos.h but don't mark these section SHF_WRITE since
   there is no shared library problem.  */
#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP	"\t.section\t.ctors,\"a\""

#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP	"\t.section\t.dtors,\"a\""

#define TARGET_ASM_CONSTRUCTOR  m68hc11_asm_out_constructor
#define TARGET_ASM_DESTRUCTOR   m68hc11_asm_out_destructor

/* This is how to begin an assembly language file.  Most svr4 assemblers want
   at least a .file directive to come first, and some want to see a .version
   directive come right after that.  Here we just establish a default
   which generates only the .file directive.  If you need a .version
   directive for any specific target, you should override this definition
   in the target-specific file which includes this one.  */

#undef ASM_FILE_START
#define ASM_FILE_START(FILE)                            \
    m68hc11_asm_file_start ((FILE), main_input_filename)

/* Comment character */
#define ASM_COMMENT_START	";"

/* Output to assembler file text saying following lines
   may contain character constants, extra white space, comments, etc.  */
#define ASM_APP_ON 		"; Begin inline assembler code\n#APP\n"

/* Output to assembler file text saying following lines
   no longer contain unusual constructs.  */
#define ASM_APP_OFF 		"; End of in