📄 arc.h
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structure) crosses that boundary, its first few words must be passed in registers and the rest must be pushed. This macro tells the compiler when this occurs, and how many of the words should go in registers. */#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0/* A C expression that indicates when an argument must be passed by reference. If nonzero for an argument, a copy of that argument is made in memory and a pointer to the argument is passed instead of the argument itself. The pointer is passed in whatever way is appropriate for passing a pointer to that type. *//* All aggregates and arguments greater than 8 bytes are passed this way. */#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \(TYPE \ && (AGGREGATE_TYPE_P (TYPE) \ || int_size_in_bytes (TYPE) > 8))/* A C expression that indicates when it is the called function's responsibility to make copies of arguments passed by reference. If the callee can determine that the argument won't be modified, it can avoid the copy. *//* ??? We'd love to be able to use NAMED here. Unfortunately, it doesn't include the last named argument so we keep track of the args ourselves. */#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \FUNCTION_ARG_PASS_BY_REFERENCE ((CUM), (MODE), (TYPE), (NAMED))/* Update the data in CUM to advance over an argument of mode MODE and data type TYPE. (TYPE is null for libcalls where that information may not be available.) */#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ + ROUND_ADVANCE_ARG ((MODE), (TYPE))))/* If defined, a C expression that gives the alignment boundary, in bits, of an argument with the specified mode and type. If it is not defined, PARM_BOUNDARY is used for all arguments. */#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \(((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ ? PARM_BOUNDARY \ : 2 * PARM_BOUNDARY)/* This macro offers an alternative to using `__builtin_saveregs' and defining the macro `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register arguments into the stack so that all the arguments appear to have been passed consecutively on the stack. Once this is done, you can use the standard implementation of varargs that works for machines that pass all their arguments on the stack. The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure, containing the values that obtain after processing of the named arguments. The arguments MODE and TYPE describe the last named argument--its machine mode and its data type as a tree node. The macro implementation should do two things: first, push onto the stack all the argument registers *not* used for the named arguments, and second, store the size of the data thus pushed into the `int'-valued variable whose name is supplied as the argument PRETEND_SIZE. The value that you store here will serve as additional offset for setting up the stack frame. If the argument NO_RTL is nonzero, it means that the arguments of the function are being analyzed for the second time. This happens for an inline function, which is not actually compiled until the end of the source file. The macro `SETUP_INCOMING_VARARGS' should not generate any instructions in this case. */#define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)/* Function results. *//* Define how to find the value returned by a function. VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)/* Define how to find the value returned by a library function assuming the value has mode MODE. */#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)/* 1 if N is a possible register number for a function value as seen by the caller. *//* ??? What about r1 in DI/DF values. */#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)/* A C expression which can inhibit the returning of certain function values in registers, based on the type of value. A nonzero value says to return the function value in memory, just as large structures are always returned. Here TYPE will be a C expression of type `tree', representing the data type of the value. */#define RETURN_IN_MEMORY(TYPE) \(AGGREGATE_TYPE_P (TYPE) \ || int_size_in_bytes (TYPE) > 8 \ || TREE_ADDRESSABLE (TYPE))/* Tell GCC to use RETURN_IN_MEMORY. */#define DEFAULT_PCC_STRUCT_RETURN 0/* Register in which address to store a structure value is passed to a function, or 0 to use `invisible' first argument. */#define STRUCT_VALUE 0/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, the stack pointer does not matter. The value is tested only in functions that have frame pointers. No definition is equivalent to always zero. */#define EXIT_IGNORE_STACK 0/* Epilogue delay slots. */#define DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue ()#define ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) \arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED)/* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. */#define FUNCTION_PROFILER(FILE, LABELNO)/* Trampolines. *//* ??? This doesn't work yet because GCC will use as the address of a nested function the address of the trampoline. We need to use that address right shifted by 2. It looks like we'll need PSImode after all. :-( *//* Output assembler code for a block containing the constant parts of a trampoline, leaving space for the variable parts. *//* On the ARC, the trampoline is quite simple as we have 32 bit immediate constants. mov r24,STATIC j.nd FUNCTION*/#define TRAMPOLINE_TEMPLATE(FILE) \do { \ assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x631f7c00)); \ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x381f0000)); \ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \} while (0)/* Length in units of the trampoline for entering a nested function. */#define TRAMPOLINE_SIZE 16/* Emit RTL insns to initialize the variable parts of a trampoline. FNADDR is an RTX for the address of the function's pure code. CXT is an RTX for the static chain value for the function. */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \do { \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \ emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \} while (0)/* Library calls. *//* Generate calls to memcpy, memcmp and memset. */#define TARGET_MEM_FUNCTIONS/* Addressing modes, and classification of registers for them. *//* Maximum number of registers that can appear in a valid memory address. *//* The `ld' insn allows 2, but the `st' insn only allows 1. */#define MAX_REGS_PER_ADDRESS 1/* We have pre inc/dec (load/store with update). */#define HAVE_PRE_INCREMENT 1#define HAVE_PRE_DECREMENT 1/* Recognize any constant value that is a valid address. */#define CONSTANT_ADDRESS_P(X) \(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)/* Nonzero if the constant value X is a legitimate general operand. We can handle any 32 or 64 bit constant. *//* "1" should work since the largest constant should be a 64 bit critter. *//* ??? Not sure what to do for 64x32 compiler. */#define LEGITIMATE_CONSTANT_P(X) 1/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects them unless they have been allocated suitable hard regs. The symbol REG_OK_STRICT causes the latter definition to be used. Most source files want to accept pseudo regs in the hope that they will get allocated to the class that the insn wants them to be in. Source files for reload pass need to be strict. After reload, it makes no difference, since pseudo regs have been eliminated by then. */#ifndef REG_OK_STRICT/* Nonzero if X is a hard reg that can be used as an index or if it is a pseudo reg. */#define REG_OK_FOR_INDEX_P(X) \((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29)/* Nonzero if X is a hard reg that can be used as a base reg or if it is a pseudo reg. */#define REG_OK_FOR_BASE_P(X) \((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29)#else/* Nonzero if X is a hard reg that can be used as an index. */#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))/* Nonzero if X is a hard reg that can be used as a base reg. */#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#endif/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression that wants to use this address. *//* The `ld' insn allows [reg],[reg+shimm],[reg+limm],[reg+reg],[limm] but the `st' insn only allows [reg],[reg+shimm],[limm]. The only thing we can do is only allow the most strict case `st' and hope other parts optimize out the restrictions for `ld'. *//* local to this file */#define RTX_OK_FOR_BASE_P(X) \(REG_P (X) && REG_OK_FOR_BASE_P (X))/* local to this file */#define RTX_OK_FOR_INDEX_P(X) \(0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X))/* local to this file *//* ??? Loads can handle any constant, stores can only handle small ones. */#define RTX_OK_FOR_OFFSET_P(X) \(GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X)))#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \(GET_CODE (X) == PLUS \ && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ && (RTX_OK_FOR_INDEX_P (XEXP (X, 1)) \ || RTX_OK_FOR_OFFSET_P (XEXP (X, 1))))#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \{ if (RTX_OK_FOR_BASE_P (X)) \ goto ADDR; \ if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \ goto ADDR; \ if (GET_CODE (X) == CONST_INT && LARGE_INT (INTVAL (X))) \ goto ADDR; \ if (GET_CODE (X) == SYMBOL_REF \ || GET_CODE (X) == LABEL_REF \ || GET_CODE (X) == CONST) \ goto ADDR; \ if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \ /* We're restricted here by the `st' insn. */ \ && RTX_OK_FOR_BASE_P (XEXP ((X), 0))) \ goto ADDR; \}/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. */#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)/* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \{ if (GET_CODE (ADDR) == PRE_DEC) \ goto LABEL; \ if (GET_CODE (ADDR) == PRE_INC) \ goto LABEL; \}/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, return the mode to be used for the comparison. */#define SELECT_CC_MODE(OP, X, Y) \arc_select_cc_mode (OP, X, Y)/* Return nonzero if SELECT_CC_MODE will never return MODE for a floating point inequality comparison. */#define REVERSIBLE_CC_MODE(MODE) 1 /*???*//* Costs. *//* An insn is define to cost 4 "units", and we work from there. COSTS_N_INSNS (N) is defined as (N) * 4 - 2 so that seems reasonable. Some values are supposed to be defined relative to each other and thus aren't necessarily related to COSTS_N_INSNS. *//* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion of a switch statement. If the code is computed here, return it with a return statement. Otherwise, break from the switch. *//* Small integers are as cheap as registers. 4 byte values can be fetched as immediate constants - let's give that the cost of an extra insn. */#define CONST_COSTS(X, CODE, OUTER_CODE) \ case CONST_INT : \ if (SMALL_INT (INTVAL (X))) \ return 0; \ /* fall through */ \ case CONST : \ case LABEL_REF : \ case SYMBOL_REF : \ return 4; \ case CONST_DOUBLE : \ { \ rtx high, low; \ split_double (X, &high, &low); \ return 4 * (!SMALL_INT (INTVAL (high)) \ + !SMALL_INT (INTVAL (low))); \ }/* Compute the cost of an address. */#define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : arc_address_cost (ADDR))/* Compute extra cost of moving data between one register class and another. */#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2/* Compute the cost of moving data between registers and memory. *//* Memory is 3 times as expensive as registers. ??? Is that the right way to look at it? */#define MEMORY_MOVE_COST(MODE,CLASS,IN) \(GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)/* The cost of a branch insn. *//* ??? What's the right value here? Branches are certainly more expensive than reg->reg moves. */#define BRANCH_COST 2/* Provide the costs of a rtl expression. This is in the body of a switch on CODE. The purpose for the cost of MULT is to encourage `synth_mult' to find a synthetic multiply when reasonable. If we need more than 12 insns to do a multiply, then go out-of-line, since the call overhead will be < 10% of the cost of the multiply. */#define RTX_COSTS(X, CODE, OUTER_CODE) \ case ASHIFT : \ case ASHIFTRT : \ case LSHIFTRT : \
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