📄 pa.h
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&& REG_OK_FOR_BASE_P (XEXP (X, 1))) \ base = XEXP (X, 1), index = XEXP (X, 0); \ if (base != 0) \ if (GET_CODE (index) == CONST_INT \ && ((INT_14_BITS (index) \ && (TARGET_SOFT_FLOAT \ || (TARGET_PA_20 \ && ((MODE == SFmode \ && (INTVAL (index) % 4) == 0)\ || (MODE == DFmode \ && (INTVAL (index) % 8) == 0)))\ || ((MODE) != SFmode && (MODE) != DFmode))) \ || INT_5_BITS (index))) \ goto ADDR; \ if (! TARGET_SOFT_FLOAT \ && ! TARGET_DISABLE_INDEXING \ && base \ && ((MODE) == SFmode || (MODE) == DFmode) \ && GET_CODE (index) == MULT \ && GET_CODE (XEXP (index, 0)) == REG \ && REG_OK_FOR_BASE_P (XEXP (index, 0)) \ && GET_CODE (XEXP (index, 1)) == CONST_INT \ && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\ goto ADDR; \ } \ else if (GET_CODE (X) == LO_SUM \ && GET_CODE (XEXP (X, 0)) == REG \ && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ && CONSTANT_P (XEXP (X, 1)) \ && (TARGET_SOFT_FLOAT \ /* We can allow symbolic LO_SUM addresses\ for PA2.0. */ \ || (TARGET_PA_20 \ && !TARGET_ELF32 \ && GET_CODE (XEXP (X, 1)) != CONST_INT)\ || ((MODE) != SFmode \ && (MODE) != DFmode))) \ goto ADDR; \ else if (GET_CODE (X) == LO_SUM \ && GET_CODE (XEXP (X, 0)) == SUBREG \ && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\ && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\ && CONSTANT_P (XEXP (X, 1)) \ && (TARGET_SOFT_FLOAT \ /* We can allow symbolic LO_SUM addresses\ for PA2.0. */ \ || (TARGET_PA_20 \ && !TARGET_ELF32 \ && GET_CODE (XEXP (X, 1)) != CONST_INT)\ || ((MODE) != SFmode \ && (MODE) != DFmode))) \ goto ADDR; \ else if (GET_CODE (X) == LABEL_REF \ || (GET_CODE (X) == CONST_INT \ && INT_5_BITS (X))) \ goto ADDR; \ /* Needed for -fPIC */ \ else if (GET_CODE (X) == LO_SUM \ && GET_CODE (XEXP (X, 0)) == REG \ && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ && GET_CODE (XEXP (X, 1)) == UNSPEC \ && (TARGET_SOFT_FLOAT \ || (TARGET_PA_20 && !TARGET_ELF32) \ || ((MODE) != SFmode \ && (MODE) != DFmode))) \ goto ADDR; \}/* Look for machine dependent ways to make the invalid address AD a valid address. For the PA, transform: memory(X + <large int>) into: if (<large int> & mask) >= 16 Y = (<large int> & ~mask) + mask + 1 Round up. else Y = (<large int> & ~mask) Round down. Z = X + Y memory (Z + (<large int> - Y)); This makes reload inheritance and reload_cse work better since Z can be reused. There may be more opportunities to improve code with this hook. */#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \do { \ int offset, newoffset, mask; \ rtx new, temp = NULL_RTX; \ \ mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \ ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \ \ if (optimize \ && GET_CODE (AD) == PLUS) \ temp = simplify_binary_operation (PLUS, Pmode, \ XEXP (AD, 0), XEXP (AD, 1)); \ \ new = temp ? temp : AD; \ \ if (optimize \ && GET_CODE (new) == PLUS \ && GET_CODE (XEXP (new, 0)) == REG \ && GET_CODE (XEXP (new, 1)) == CONST_INT) \ { \ offset = INTVAL (XEXP ((new), 1)); \ \ /* Choose rounding direction. Round up if we are >= halfway. */ \ if ((offset & mask) >= ((mask + 1) / 2)) \ newoffset = (offset & ~mask) + mask + 1; \ else \ newoffset = offset & ~mask; \ \ if (newoffset != 0 \ && VAL_14_BITS_P (newoffset)) \ { \ \ temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \ GEN_INT (newoffset)); \ AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\ push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \ BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \ (OPNUM), (TYPE)); \ goto WIN; \ } \ } \} while (0)/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. */#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \{ rtx orig_x = (X); \ (X) = hppa_legitimize_address (X, OLDX, MODE); \ if ((X) != orig_x && memory_address_p (MODE, X)) \ goto WIN; }/* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ if (GET_CODE (ADDR) == PRE_DEC \ || GET_CODE (ADDR) == POST_DEC \ || GET_CODE (ADDR) == PRE_INC \ || GET_CODE (ADDR) == POST_INC) \ goto LABEL#define TARGET_ASM_SELECT_SECTION pa_select_section /* Define this macro if references to a symbol must be treated differently depending on something about the variable or function named by the symbol (such as what section it is in). The macro definition, if any, is executed immediately after the rtl for DECL or other node is created. The value of the rtl will be a `mem' whose address is a `symbol_ref'. The usual thing for this macro to do is to a flag in the `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified name string in the `symbol_ref' (if one bit is not enough information). On the HP-PA we use this to indicate if a symbol is in text or data space. Also, function labels need special treatment. */#define TEXT_SPACE_P(DECL)\ (TREE_CODE (DECL) == FUNCTION_DECL \ || (TREE_CODE (DECL) == VAR_DECL \ && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ && !flag_pic) \ || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \ && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))#define FUNCTION_NAME_P(NAME) (*(NAME) == '@')/* Specify the machine mode that this machine uses for the index in the tablejump instruction. */#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)/* Jump tables must be 32 bit aligned, no matter the size of the element. */#define ADDR_VEC_ALIGN(ADDR_VEC) 2/* Define this as 1 if `char' should by default be signed; else as 0. */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move from memory to memory in one reasonably fast instruction. */#define MOVE_MAX 8/* Higher than the default as we prefer to use simple move insns (better scheduling and delay slot filling) and because our built-in block move is really a 2X unrolled loop. Believe it or not, this has to be big enough to allow for copying all arguments passed in registers to avoid infinite recursion during argument setup for a function call. Why? Consider how we copy the stack slots reserved for parameters when they may be trashed by a call. */#define MOVE_RATIO (TARGET_64BIT ? 8 : 4)/* Define if operations between registers always perform the operation on the full register even if a narrower mode is specified. */#define WORD_REGISTER_OPERATIONS/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD will either zero-extend or sign-extend. The value of this macro should be the code that says which one of the two operations is implicitly done, NIL if none. */#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND/* Nonzero if access to memory by bytes is slow and undesirable. */#define SLOW_BYTE_ACCESS 1/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* We assume that the store-condition-codes instructions store 0 for false and some other value for true. This is the value stored for true. */#define STORE_FLAG_VALUE 1/* When a prototype says `char' or `short', really pass an `int'. */#define PROMOTE_PROTOTYPES 1#define PROMOTE_FUNCTION_RETURN 1/* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */#define Pmode word_mode/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, return the mode to be used for the comparison. For floating-point, CCFPmode should be used. CC_NOOVmode should be used when the first operand is a PLUS, MINUS, or NEG. CCmode should be used when no special processing is needed. */#define SELECT_CC_MODE(OP,X,Y) \ (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \/* A function address in a call instruction is a byte address (for indexing purposes) so give the MEM rtx a byte's mode. */#define FUNCTION_MODE SImode/* Define this if addresses of constant functions shouldn't be put through pseudo regs where they can be cse'd. Desirable on machines where ordinary constants are expensive but a CALL with constant address is cheap. */#define NO_FUNCTION_CSE/* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */#define SHIFT_COUNT_TRUNCATED 1/* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion of a switch statement. If the code is computed here, return it with a return statement. Otherwise, break from the switch. */#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ case CONST_INT: \ if (INTVAL (RTX) == 0) return 0; \ if (INT_14_BITS (RTX)) return 1; \ case HIGH: \ return 2; \ case CONST: \ case LABEL_REF: \ case SYMBOL_REF: \ return 4; \ case CONST_DOUBLE: \ if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \ && OUTER_CODE != SET) \ return 0; \ else \ return 8;#define ADDRESS_COST(RTX) \ (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))/* Compute extra cost of moving data between one register class and another. Make moves from SAR so expensive they should never happen. We used to have 0xffff here, but that generates overflow in rare cases. Copies involving a FP register and a non-FP register are relatively expensive because they must go through memory. Other copies are reasonably cheap. */#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ (CLASS1 == SHIFT_REGS ? 0x100 \ : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \ : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \ : 2)/* Provide the costs of a rtl expression. This is in the body of a switch on CODE. The purpose for the cost of MULT is to encourage `synth_mult' to find a synthetic multiply when reasonable. */#define RTX_COSTS(X,CODE,OUTER_CODE) \ case MULT: \ if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ return COSTS_N_INSNS (3); \ return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \ ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \ case DIV: \ if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ return COSTS_N_INSNS (14); \ case UDIV: \ case MOD: \ case UMOD: \ return COSTS_N_INSNS (60); \ case PLUS: /* this includes shNadd insns */ \ case MINUS: \ if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ return COSTS_N_INSNS (3); \ return COST
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