d30v.md

gcc-you can use this code to learn something about gcc, and inquire further into linux,

(define_split
  [(set (match_operand:DI 0 "gpr_operand" "")
	(zero_extend:DI (match_operand:HI 1 "gpr_or_memory_operand" "")))]
  "reload_completed"
  [(set (match_dup 2) (zero_extend:SI (match_dup 1)))
   (set (match_dup 3) (const_int 0))]
  "
{
  d30v_split_double (operands[0], &operands[3], &operands[2]);
}")

(define_insn "zero_extendsidi2"
  [(set (match_operand:DI 0 "gpr_operand" "=e,e,e")
	(zero_extend:DI (match_operand:SI 1 "gpr_or_memory_operand" "d,Q,m")))]
  ""
  "#"
  [(set_attr "length" "8,8,12")
   (set_attr "type" "multi")])

(define_split
  [(set (match_operand:DI 0 "gpr_operand" "")
	(zero_extend:DI (match_operand:SI 1 "gpr_or_memory_operand" "")))]
  "reload_completed"
  [(set (match_dup 2) (match_dup 1))
   (set (match_dup 3) (const_int 0))]
  "
{
  d30v_split_double (operands[0], &operands[3], &operands[2]);
}")


;; ::::::::::::::::::::
;; ::
;; :: 32 bit Integer arithmetic
;; ::
;; ::::::::::::::::::::

;; Addition
(define_expand "addsi3"
  [(parallel [(set (match_operand:SI 0 "gpr_operand" "")
		   (plus:SI (match_operand:SI 1 "gpr_operand" "")
			    (match_operand:SI 2 "gpr_or_constant_operand" "")))
	      (clobber (match_dup 3))
	      (clobber (match_dup 4))
	      (clobber (match_dup 5))])]
  ""
  "
{
  operands[3] = gen_rtx (REG, CCmode, FLAG_CARRY);
  operands[4] = gen_rtx (REG, CCmode, FLAG_OVERFLOW);
  operands[5] = gen_rtx (REG, CCmode, FLAG_ACC_OVER);
}")

(define_insn "*addsi3_internal"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d")
	(plus:SI (match_operand:SI 1 "gpr_operand" "%d,d")
		 (match_operand:SI 2 "gpr_or_constant_operand" "dI,i")))
   (clobber (match_operand:CC 3 "flag_operand" "=f,f"))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f"))]
  ""
  "add%: %0,%1,%2"
  [(set_attr "length" "4,8")
   (set_attr "type" "either,long")])

;; Subtraction
(define_expand "subsi3"
  [(parallel [(set (match_operand:SI 0 "gpr_operand" "")
		   (minus:SI (match_operand:SI 1 "reg_or_0_operand" "")
			     (match_operand:SI 2 "gpr_or_constant_operand" "")))
	      (clobber (match_dup 3))
	      (clobber (match_dup 4))
	      (clobber (match_dup 5))])]
  ""
  "
{
  operands[3] = gen_rtx (REG, CCmode, FLAG_CARRY);
  operands[4] = gen_rtx (REG, CCmode, FLAG_OVERFLOW);
  operands[5] = gen_rtx (REG, CCmode, FLAG_ACC_OVER);
}")

(define_insn "*subsi3_internal"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d,d,d")
	(minus:SI (match_operand:SI 1 "reg_or_0_operand" "d,d,O,O")
		  (match_operand:SI 2 "gpr_or_constant_operand" "dI,i,dI,i")))
   (clobber (match_operand:CC 3 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f,f,f"))]
  ""
  "@
    sub%: %0,%1,%2
    sub%: %0,%1,%2
    sub%: %0,%.,%2
    sub%: %0,%.,%2"
  [(set_attr "length" "4,8,4,8")
   (set_attr "type" "either,long,either,long")])

;; Multiplication (same size)
(define_insn "mulsi3"
  [(set (match_operand:SI 0 "gpr_operand" "=d")
	(mult:SI (match_operand:SI 1 "gpr_operand" "%d")
		 (match_operand:SI 2 "gpr_or_signed6_operand" "dI")))]
  ""
  "mul%: %0,%1,%2"
  [(set_attr "length" "4")
   (set_attr "type" "mul")])

;; Signed multiplication producing 64 bit results from 32 bit inputs
(define_insn "mulsidi3"
  [(set (match_operand:DI 0 "accum_operand" "=a")
	(mult:DI (sign_extend:DI (match_operand:SI 1 "gpr_operand" "d"))
		 (sign_extend:DI (match_operand:SI 2 "gpr_operand" "d"))))]
  ""
  "mulx%: %0,%1,%2"
  [(set_attr "length" "4")
   (set_attr "type" "mul")])

(define_insn "*mulsidi3_const"
  [(set (match_operand:DI 0 "accum_operand" "=a")
	(mult:DI (sign_extend:DI (match_operand:SI 1 "gpr_operand" "%d"))
		 (match_operand:DI 2 "signed6_operand" "I")))]
  ""
  "mulx%: %0,%1,%2"
  [(set_attr "length" "4")
   (set_attr "type" "mul")])

;; Signed multiplication producing just the upper 32 bits from a 32x32->64
;; bit multiply.  We specifically allow any integer constant here so
;; allow division by constants to be done by multiplying by a large constant.

(define_expand "smulsi3_highpart"
  [(set (match_dup 3)
	(mult:DI (sign_extend:DI (match_operand:SI 1 "gpr_operand" ""))
		 (match_operand:SI 2 "gpr_or_constant_operand" "")))
   (set (match_operand:SI 0 "gpr_operand" "")
	(truncate:SI (lshiftrt:DI (match_dup 3)
				  (const_int 32))))]
  ""
  "
{
  operands[3] = gen_reg_rtx (DImode);

  if (GET_CODE (operands[2]) == CONST_INT &&
      !IN_RANGE_P (INTVAL (operands[2]), -32, 31))
    operands[2] = force_reg (SImode, operands[2]);

  if (GET_CODE (operands[2]) == REG || GET_CODE (operands[2]) == SUBREG)
    operands[2] = gen_rtx (SIGN_EXTEND, DImode, operands[2]);
}")

(define_insn "*di_highpart"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d")
	(truncate:SI (lshiftrt:DI (match_operand:DI 1 "gpr_or_accum_operand" "e,a")
		      (const_int 32))))]
  ""
  "@
    or%: %0,%.,%U1
    mvfacc%: %0,%1,32"
  [(set_attr "length" "4")
   (set_attr "type" "either,iu")])

;; Negation
(define_expand "negsi2"
  [(parallel [(set (match_operand:SI 0 "gpr_operand" "")
		   (neg:SI (match_operand:SI 1 "gpr_operand" "")))
	      (clobber (match_dup 2))
	      (clobber (match_dup 3))
	      (clobber (match_dup 4))])]
  ""
  "
{
  operands[2] = gen_rtx (REG, CCmode, FLAG_CARRY);
  operands[3] = gen_rtx (REG, CCmode, FLAG_OVERFLOW);
  operands[4] = gen_rtx (REG, CCmode, FLAG_ACC_OVER);
}")

(define_insn "*negsi2_internal"
  [(set (match_operand:SI 0 "gpr_operand" "=d")
	(neg:SI (match_operand:SI 1 "gpr_operand" "d")))
   (clobber (match_operand:CC 2 "flag_operand" "=f"))
   (clobber (match_operand:CC 3 "flag_operand" "=f"))
   (clobber (match_operand:CC 4 "flag_operand" "=f"))]
  ""
  "sub%: %0,%.,%1"
  [(set_attr "length" "4")
   (set_attr "type" "either")])

;; Absolute value
(define_insn "abssi2"
  [(set (match_operand:SI 0 "gpr_operand" "=d")
	(abs:SI (match_operand:SI 1 "gpr_operand" "d")))]
  ""
  "abs%: %0,%1"
  [(set_attr "length" "4")
   (set_attr "type" "either")])


;; ::::::::::::::::::::
;; ::
;; :: 64 bit Integer arithmetic
;; ::
;; ::::::::::::::::::::

;; Addition
(define_expand "adddi3"
  [(parallel [(set (match_operand:DI 0 "gpr_operand" "")
		   (plus:DI (match_operand:DI 1 "gpr_operand" "")
			    (match_operand:DI 2 "gpr_or_constant_operand" "")))
	      (clobber (match_dup 3))
	      (clobber (match_dup 4))
	      (clobber (match_dup 5))])]
  ""
  "
{
  operands[3] = gen_rtx (REG, CCmode, FLAG_CARRY);
  operands[4] = gen_rtx (REG, CCmode, FLAG_OVERFLOW);
  operands[5] = gen_rtx (REG, CCmode, FLAG_ACC_OVER);
}")

(define_insn "*adddi3_internal"
  [(set (match_operand:DI 0 "gpr_operand" "=e,e,e,e")
	(plus:DI (match_operand:DI 1 "gpr_operand" "%e,e,e,e")
		 (match_operand:DI 2 "gpr_or_constant_operand" "I,i,e,F")))
   (clobber (match_operand:CC 3 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f,f,f"))]
  ""
  "#"
  [(set_attr "length" "8,12,8,16")
   (set_attr "type" "multi")])

(define_insn "addsi3_set_carry"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d")
	(plus:SI (match_operand:SI 1 "gpr_operand" "%d,d")
		 (match_operand:SI 2 "gpr_or_constant_operand" "dI,i")))
   (set (match_operand:CC 3 "carry_operand" "=f,f")
	(unspec:CC [(match_dup 1)
		 (match_dup 2)] 1))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f"))]
  ""
  "add%: %0,%1,%2"
  [(set_attr "length" "4,8")
   (set_attr "type" "scarry,lcarry")])

(define_insn "addsi3_use_carry"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d")
	(unspec:SI [(match_operand:SI 1 "gpr_operand" "%d,d")
		 (match_operand:SI 2 "gpr_or_constant_operand" "dI,i")
		 (match_operand:CC 3 "carry_operand" "+f,f")] 2))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f"))]
  ""
  "addc%: %0,%1,%2"
  [(set_attr "length" "4,8")
   (set_attr "type" "scarry,lcarry")])

(define_split
  [(set (match_operand:DI 0 "gpr_operand" "")
	(plus:DI (match_operand:DI 1 "gpr_operand" "")
		 (match_operand:DI 2 "gpr_or_constant_operand" "")))
   (clobber (match_operand:CC 3 "flag_operand" ""))
   (clobber (match_operand:CC 4 "flag_operand" ""))
   (clobber (match_operand:CC 5 "flag_operand" ""))]
  "reload_completed"
  [(match_dup 6)
   (match_dup 7)]
  "
{
  rtx high[3];
  rtx low[3];

  d30v_split_double (operands[0], &high[0], &low[0]);
  d30v_split_double (operands[1], &high[1], &low[1]);
  d30v_split_double (operands[2], &high[2], &low[2]);

  operands[6] = gen_addsi3_set_carry (low[0], low[1], low[2], operands[3],
				      operands[4], operands[5]);

  operands[7] = gen_addsi3_use_carry (high[0], high[1], high[2], operands[3],
				      operands[4], operands[5]);
}")

;; Subtraction
(define_expand "subdi3"
  [(parallel [(set (match_operand:DI 0 "gpr_operand" "")
		   (minus:DI (match_operand:DI 1 "gpr_operand" "")
			     (match_operand:DI 2 "gpr_or_constant_operand" "")))
	      (clobber (match_dup 3))
	      (clobber (match_dup 4))
	      (clobber (match_dup 5))])]
  ""
  "
{
  operands[3] = gen_rtx (REG, CCmode, FLAG_CARRY);
  operands[4] = gen_rtx (REG, CCmode, FLAG_OVERFLOW);
  operands[5] = gen_rtx (REG, CCmode, FLAG_ACC_OVER);
}")

(define_insn "*subdi3_internal"
  [(set (match_operand:DI 0 "gpr_operand" "=e,e,e,e")
	(minus:DI (match_operand:DI 1 "gpr_operand" "e,e,e,e")
		  (match_operand:DI 2 "gpr_or_constant_operand" "I,i,e,F")))
   (clobber (match_operand:CC 3 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f,f,f"))]
  ""
  "#"
  [(set_attr "length" "8,12,8,16")
   (set_attr "type" "multi")])

(define_insn "subsi3_set_carry"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d,d,d")
	(minus:SI (match_operand:SI 1 "reg_or_0_operand" "d,d,O,O")
		  (match_operand:SI 2 "gpr_or_constant_operand" "dI,i,dI,i")))
   (set (match_operand:CC 3 "carry_operand" "=f,f,f,f")
	(unspec:CC [(match_dup 1)
		    (match_dup 2)] 3))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f,f,f"))]
  ""
  "@
    sub%: %0,%1,%2
    sub%: %0,%1,%2
    sub%: %0,%.,%2
    sub%: %0,%.,%2"
  [(set_attr "length" "4,8,4,8")
   (set_attr "type" "scarry,lcarry,scarry,lcarry")])

(define_insn "subsi3_use_carry"
  [(set (match_operand:SI 0 "gpr_operand" "=d,d,d,d")
	(unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "d,d,O,O")
		    (match_operand:SI 2 "gpr_operand" "dI,i,dI,i")
		    (match_operand:CC 3 "carry_operand" "+f,f,f,f")] 4))
   (clobber (match_operand:CC 4 "flag_operand" "=f,f,f,f"))
   (clobber (match_operand:CC 5 "flag_operand" "=f,f,f,f"))]
  ""
  "@
    subb%: %0,%1,%2
    subb%: %0,%1,%2
    subb%: %0,%.,%2
    subb%: %0,%.,%2"
  [(set_attr "length" "4,8,4,8")
   (set_attr "type" "scarry,lcarry,scarry,lcarry")])

(define_split
  [(set (match_operand:DI 0 "gpr_operand" "")
	(minus:DI (match_operand:DI 1 "gpr_operand" "")
		  (match_operand:DI 2 "gpr_or_constant_operand" "")))
   (clobber (match_operand:CC 3 "flag_operand" ""))
   (clobber (match_operand:CC 4 "flag_operand" ""))
   (clobber (match_operand:CC 5 "flag_operand" ""))]
  "reload_completed"
  [(match_dup 6)
   (match_dup 7)]
  "
{
  rtx high[3];
  rtx low[3];

  d30v_split_double (operands[0], &high[0], &low[0]);
  d30v_split_double (operands[1], &high[1], &low[1]);
  d30v_split_double (operands[2], &high[2], &low[2]);

  operands[6] = gen_subsi3_set_carry (low[0], low[1], low[2], operands[3],
				      operands[4], operands[5]);

  operands[7] = gen_subsi3_use_carry (high[0], high[1], high[2], operands[3],
				      operands[4], operands[5]);
}")

;; Negation
(define_expand "negdi2"
  [(parallel [(set (match_operand:DI 0 "gpr_operand" "")
		   (neg:DI (match_operand:DI 1 "gpr_operand" "")))