📄 isr.lst
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< //... Define for P_LVD_Ctrl ...................
< .DEFINE C_LVD24V 0x0000; // LVD = 2.4V
< .DEFINE C_LVD28V 0x0001; // LVD = 2.8V
< .DEFINE C_LVD32V 0x0002; // LVD = 3.2V
< .DEFINE C_LVD36V 0x0003; // LVD = 3.6V
<
<
< .EXTERNAL F_SP_Read_INT_Status; // for further use
< .EXTERNAL F_SP_Write_INT_Status; // for further use
< .EXTERNAL F_SP_Set_INT_Vector; // for further use
< .EXTERNAL F_SP_Clear_INT_Vector; // for further use
<
< .EXTERNAL F_SP_Send_Out; //
< .EXTERNAL F_SP_Send_DAC1; //
< .EXTERNAL F_SP_Send_DAC2; //
< .EXTERNAL F_SP_Send_Two_DAC; //
< .EXTERNAL F_SP_Init_HW; //
<
< .EXTERNAL R_InterruptStatus;
<
<
< .EXTERNAL F_SP_RampUpDAC1;
< .EXTERNAL F_SP_RampDnDAC1;
< .EXTERNAL F_SP_RampUpDAC2;
< .EXTERNAL F_SP_RampDnDAC2;
<
< .EXTERNAL F_SP_InitQueue;
< .EXTERNAL F_SP_ReadQueue;
< .EXTERNAL F_SP_WriteQueue;
< .EXTERNAL F_SP_TestQueue;
<
<
<
< .EXTERNAL F_SP_Get_ADC
<
< .EXTERNAL F_SP_Set_P_TimerA_Ctrl
< .EXTERNAL F_SP_Set_P_TimerA_Data
< .EXTERNAL F_SP_Set_P_TimerB_Ctrl
< .EXTERNAL F_SP_Set_P_TimerB_Data
< .EXTERNAL F_SP_Set_P_INT_Ctrl
< .EXTERNAL F_SP_Set_P_INT_Clear
< .EXTERNAL F_SP_Set_P_SystemClock
< .EXTERNAL F_SP_Set_P_DAC_Ctrl
< .EXTERNAL F_SP_Set_P_ADC_Ctrl
<
<
<
< //--------------------------------------------
< SACM_MACRO1: .MACRO
<
< .ENDM
<
< SACM_MACRO2: .MACRO
<
< .ENDM
<
<
<
<
< //.define PC_Play_Enable_A2000 1 // Enable the PC-Play function for SACM-A2000 module
< //.define PC_Play_Enable_S480 1 // Enable the PC-Play function for SACM-S480 module
< //.define PC_Play_Enable_S240 1 // Enable the PC-Play function for SACM-S240 module
< //.define PC_Play_Enable_MS01 1 // Enable the PC-Play function for SACM-MS01 module
<
<
<
< //========================================================================================
< // End of hardware.inc
< //========================================================================================
.include A2000.inc
< //////////////////////////////////////////////////////////////////////////////////////////
< // Progarm: SACM-A2000 API external definition
< // Writen by: Andy
< // Date: 2000/06/20
< //////////////////////////////////////////////////////////////////////////////////////////
<
< .external F_SACM_A2000_Initial;
< .external F_SACM_A2000_ServiceLoop;
< .external F_SACM_A2000_Play;
< .external F_SACM_A2000_Stop;
< .external F_SACM_A2000_Pause;
< .external F_SACM_A2000_Resume;
<
< .external F_SACM_A2000_Volume;
< .external F_SACM_A2000_Status;
<
< .external F_SACM_A2000_PcPlayInitial;
<
< .external F_FIQ_Service_SACM_A2000;
<
<
< //========================================================================================
< // End of a2000.inc
< //========================================================================================
<
.include Resource.inc
<
< // Resource Table
< // Created by IDE, Do not modify this table
<
00008045 < .TEXT
< .external _RES_Table;
< .external _RES_DOT_16K_SA;
< .external _RES_DOT_16K_EA;
< .external _RES_0_16K_SA;
< .external _RES_0_16K_EA;
< .external _RES_1_16K_SA;
< .external _RES_1_16K_EA;
< .external _RES_2_16K_SA;
< .external _RES_2_16K_EA;
< .external _RES_3_16K_SA;
< .external _RES_3_16K_EA;
< .external _RES_4_16K_SA;
< .external _RES_4_16K_EA;
< .external _RES_5_16K_SA;
< .external _RES_5_16K_EA;
< .external _RES_6_16K_SA;
< .external _RES_6_16K_EA;
< .external _RES_7_16K_SA;
< .external _RES_7_16K_EA;
< .external _RES_8_16K_SA;
< .external _RES_8_16K_EA;
< .external _RES_9_16K_SA;
< .external _RES_9_16K_EA;
< .external _RES_10_16K_SA;
< .external _RES_10_16K_EA;
<
< // End Table
.public _FIQ;
_FIQ:
00008045 A0 D8 PUSH R1,R4 to [sp];
00008046 09 93 00 20 R1 = 0x2000;
00008048 11 C3 10 70 test R1,[P_INT_Ctrl];
0000804A 0B 4E jnz L_FIQ_TimerA;
0000804B 09 93 00 08 R1 = 0x0800;
0000804D 11 C3 10 70 test R1,[P_INT_Ctrl];
0000804F 0C 4E jnz L_FIQ_TimerB;
L_FIQ_PWM:
00008050 09 93 00 80 R1 = C_FIQ_PWM;
00008052 19 D3 11 70 [P_INT_Clear] = R1;
00008054 A0 90 POP R1,R4 from[sp];
00008055 98 9A reti;
L_FIQ_TimerA:
00008056 19 D3 11 70 [P_INT_Clear] = R1;
00008058 40 F0 F0 85 call F_FIQ_Service_SACM_A2000;
0000805A A0 90 pop R1,R4 from [sp];
0000805B 98 9A reti;
L_FIQ_TimerB:
0000805C 19 D3 11 70 [P_INT_Clear]=R1;
0000805E A0 90 pop R1,R4 from [sp];
0000805F 98 9A RETI;
//===================================================================================
//函数：F_ClearWatchdog（）
//语法：void F_ClearWatchdog(void)
//描述：清看门狗
//参数：无
//返回：无
//===================================================================================
00009374 .code
.public _F_ClearWatchdog;
_F_ClearWatchdog: .proc
00009374 41 92 R1 = 0x0001;
00009375 19 D3 12 70 [P_Watchdog_Clear] = R1;
00009377 90 9A RETF;
.ENDP
0 error(s), 0 warning(s).
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