seller.fit.smsg

自动售货机的程序

Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Sun Nov 23 14:56:09 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off seller -c seller
Info: Selected device EP2C20F484C7 for design "seller"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Fitter is using the Classic Timing Analyzer
Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time.
Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use
    Info: Previous placement does not exist for 163 of 163 atoms in partition Top
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EP2C15AF484C7 is compatible
    Info: Device EP2C35F484C7 is compatible
    Info: Device EP2C50F484C7 is compatible
Info: Fitter converted 3 user pins into dedicated programming pins
    Info: Pin ~ASDO~ is reserved at location C4
    Info: Pin ~nCSO~ is reserved at location C3
    Info: Pin ~LVDS91p/nCEO~ is reserved at location W20
Info: Automatically promoted node clk_in (placed in PIN L1 (CLK0, LVDSCLK0p, Input))
    Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2
Info: Automatically promoted node std_div:inst1|clk_temp 
    Info: Automatically promoted destinations to use location or clock signal Global Clock
    Info: Following destination nodes may be non-global or may not use global or regional clocks
        Info: Destination node std_div:inst1|clk_temp~5
Info: Automatically promoted node Reset_Delay:inst2|oRESET 
    Info: Automatically promoted destinations to use location or clock signal Global Clock
Info: Starting register packing
Info: Finished register packing: elapsed time is 00:00:01
    Extra Info: No registers were packed into other blocks
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Estimated most critical path is register to register delay of 2.332 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X43_Y14; Fanout = 3; REG Node = 'debounce:inst3|dout2[0]'
    Info: 2: + IC(0.560 ns) + CELL(0.178 ns) = 0.738 ns; Loc. = LAB_X43_Y14; Fanout = 9; COMB Node = 'seller:inst|always2~0'
    Info: 3: + IC(0.498 ns) + CELL(0.178 ns) = 1.414 ns; Loc. = LAB_X43_Y14; Fanout = 1; COMB Node = 'seller:inst|Selector2~186'
    Info: 4: + IC(0.365 ns) + CELL(0.457 ns) = 2.236 ns; Loc. = LAB_X42_Y14; Fanout = 1; COMB Node = 'seller:inst|Selector2~187'
    Info: 5: + IC(0.000 ns) + CELL(0.096 ns) = 2.332 ns; Loc. = LAB_X42_Y14; Fanout = 3; REG Node = 'seller:inst|PS.idle'
    Info: Total cell delay = 0.909 ns ( 38.98 % )
    Info: Total interconnect delay = 1.423 ns ( 61.02 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%
    Info: The peak interconnect region extends from location X25_Y14 to location X37_Y27
Info: Fitter routing operations ending: elapsed time is 00:00:01
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Started post-fitting delay annotation
Warning: Found 3 output pins without output pin load capacitance assignment
    Info: Pin "sell" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "fetch" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "get" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Info: Quartus II Fitter was successful. 0 errors, 1 warning
    Info: Allocated 194 megabytes of memory during processing
    Info: Processing ended: Sun Nov 23 14:56:23 2008
    Info: Elapsed time: 00:00:14