seller.map.rpt

自动售货机的程序

;     -- arithmetic mode                      ; 46     ;
;                                             ;        ;
; Total registers                             ; 67     ;
;     -- Dedicated logic registers            ; 67     ;
;     -- I/O registers                        ; 0      ;
;                                             ;        ;
; I/O pins                                    ; 0      ;
; Maximum fan-out node                        ; clk_in ;
; Maximum fan-out                             ; 61     ;
; Total fan-out                               ; 407    ;
; Average fan-out                             ; 2.50   ;
+---------------------------------------------+--------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name       ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------------+
; |Block1                    ; 90 (0)            ; 67 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1                   ;
;    |Reset_Delay:inst2|     ; 33 (33)           ; 25 (25)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1|Reset_Delay:inst2 ;
;    |debounce:inst3|        ; 2 (2)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1|debounce:inst3    ;
;    |seller:inst|           ; 14 (14)           ; 9 (9)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1|seller:inst       ;
;    |std_div:inst1|         ; 41 (41)           ; 27 (27)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1|std_div:inst1     ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------+
; State Machine - |Block1|seller:inst|PS                                      ;
+--------------+--------------+-------------+-----------+-----------+---------+
; Name         ; PS.liangkuai ; PS.yikuaiwu ; PS.yikuai ; PS.wujiao ; PS.idle ;
+--------------+--------------+-------------+-----------+-----------+---------+
; PS.idle      ; 0            ; 0           ; 0         ; 0         ; 0       ;
; PS.yikuaiwu  ; 0            ; 1           ; 0         ; 0         ; 1       ;
; PS.yikuai    ; 0            ; 0           ; 1         ; 0         ; 1       ;
; PS.wujiao    ; 0            ; 0           ; 0         ; 1         ; 1       ;
; PS.liangkuai ; 1            ; 0           ; 0         ; 0         ; 1       ;
+--------------+--------------+-------------+-----------+-----------+---------+


+-----------------------------------------------------------------------+
; Registers Removed During Synthesis                                    ;
+---------------------------------------+-------------------------------+
; Register name                         ; Reason for Removal            ;
+---------------------------------------+-------------------------------+
; inst/fetch_alarm                      ; Merged with inst/sell_succeed ;
; Total Number of Removed Registers = 1 ;                               ;
+---------------------------------------+-------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 67    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 9     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 23    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+----------------------------------------------------------+
; Parameter Settings for User Entity Instance: seller:inst ;
+----------------+-------+---------------------------------+
; Parameter Name ; Value ; Type                            ;
+----------------+-------+---------------------------------+
; idle           ; 00001 ; Unsigned Binary                 ;
; wujiao         ; 00010 ; Unsigned Binary                 ;
; yikuai         ; 00100 ; Unsigned Binary                 ;
; yikuaiwu       ; 01000 ; Unsigned Binary                 ;
; liangkuai      ; 10000 ; Unsigned Binary                 ;
+----------------+-------+---------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------+
; Parameter Settings for User Entity Instance: debounce:inst3 ;
+----------------+-------+------------------------------------+
; Parameter Name ; Value ; Type                               ;
+----------------+-------+------------------------------------+
; key_width      ; 2     ; Untyped                            ;
+----------------+-------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------+
; Parameter Settings for User Entity Instance: std_div:inst1 ;
+----------------+--------+----------------------------------+
; Parameter Name ; Value  ; Type                             ;
+----------------+--------+----------------------------------+
; diver          ; 250000 ; Untyped                          ;
; div_width      ; 25     ; Untyped                          ;
+----------------+--------+----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Sun Nov 23 14:56:00 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off seller -c seller
Info: Found 1 design units, including 1 entities, in source file seller.v
    Info: Found entity 1: seller
Info: Found 1 design units, including 1 entities, in source file Block1.bdf
    Info: Found entity 1: Block1
Info: Elaborating entity "Block1" for the top level hierarchy
Info: Elaborating entity "seller" for hierarchy "seller:inst"
Info (10264): Verilog HDL Case Statement information at seller.v(111): all case item expressions in this case statement are onehot
Warning: Using design file Reset_Delay.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: Reset_Delay
Info: Elaborating entity "Reset_Delay" for hierarchy "Reset_Delay:inst2"
Warning: Using design file debounce.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: debounce
Info: Elaborating entity "debounce" for hierarchy "debounce:inst3"
Warning: Using design file std_div.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: std_div
Info: Elaborating entity "std_div" for hierarchy "std_div:inst1"
Info: Duplicate registers merged to single register
    Info: Duplicate register "seller:inst|fetch_alarm" merged to single register "seller:inst|sell_succeed"
Info: State machine "|Block1|seller:inst|PS" contains 5 states
Info: Selected Auto state machine encoding method for state machine "|Block1|seller:inst|PS"
Info: Encoding result for state machine "|Block1|seller:inst|PS"
    Info: Completed encoding using 5 state bits
        Info: Encoded state bit "seller:inst|PS.liangkuai"
        Info: Encoded state bit "seller:inst|PS.yikuaiwu"
        Info: Encoded state bit "seller:inst|PS.yikuai"
        Info: Encoded state bit "seller:inst|PS.wujiao"
        Info: Encoded state bit "seller:inst|PS.idle"
    Info: State "|Block1|seller:inst|PS.idle" uses code string "00000"
    Info: State "|Block1|seller:inst|PS.yikuaiwu" uses code string "01001"
    Info: State "|Block1|seller:inst|PS.yikuai" uses code string "00101"
    Info: State "|Block1|seller:inst|PS.wujiao" uses code string "00011"
    Info: State "|Block1|seller:inst|PS.liangkuai" uses code string "10001"
Info: Implemented 105 device resources after synthesis - the final resource count might be different
    Info: Implemented 3 input pins
    Info: Implemented 3 output pins
    Info: Implemented 99 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 3 warnings
    Info: Allocated 126 megabytes of memory during processing
    Info: Processing ended: Sun Nov 23 14:56:03 2008
    Info: Elapsed time: 00:00:03