📄 add1.fit.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
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-- applicable agreement for further details.
--r[0] is r[0] at LC1_B35
--operation mode is normal
r[0]_lut_out = ci $ b[0] $ a[0];
r[0] = DFFEA(r[0]_lut_out, GLOBAL(clk), , , , , );
--A1L64Q is r[0]~56 at LC1_B35
--operation mode is normal
A1L64Q = r[0];
--r[1] is r[1] at LC2_B47
--operation mode is normal
r[1]_lut_out = A1L72 $ sign1 $ b[1] $ a[1];
r[1] = DFFEA(r[1]_lut_out, GLOBAL(clk), , , , , );
--A1L84Q is r[1]~57 at LC2_B47
--operation mode is normal
A1L84Q = r[1];
--r[2] is r[2] at LC4_B47
--operation mode is normal
r[2]_lut_out = A1L92 $ sign1 $ b[2] $ a[2];
r[2] = DFFEA(r[2]_lut_out, GLOBAL(clk), , , , , );
--A1L05Q is r[2]~58 at LC4_B47
--operation mode is normal
A1L05Q = r[2];
--r[3] is r[3] at LC1_B47
--operation mode is normal
r[3]_lut_out = A1L13 $ sign1 $ b[3] $ a[3];
r[3] = DFFEA(r[3]_lut_out, GLOBAL(clk), , , , , );
--A1L25Q is r[3]~59 at LC1_B47
--operation mode is normal
A1L25Q = r[3];
--r[4] is r[4] at LC4_B40
--operation mode is normal
r[4]_lut_out = A1L33 $ sign1 $ b[4] $ a[4];
r[4] = DFFEA(r[4]_lut_out, GLOBAL(clk), , , , , );
--A1L45Q is r[4]~60 at LC4_B40
--operation mode is normal
A1L45Q = r[4];
--r[5] is r[5] at LC8_B34
--operation mode is normal
r[5]_lut_out = A1L53 $ sign1 $ b[5] $ a[5];
r[5] = DFFEA(r[5]_lut_out, GLOBAL(clk), , , , , );
--A1L65Q is r[5]~61 at LC8_B34
--operation mode is normal
A1L65Q = r[5];
--r[6] is r[6] at LC3_B34
--operation mode is normal
r[6]_lut_out = A1L73 $ sign1 $ b[6] $ a[6];
r[6] = DFFEA(r[6]_lut_out, GLOBAL(clk), , , , , );
--A1L85Q is r[6]~62 at LC3_B34
--operation mode is normal
A1L85Q = r[6];
--r[7] is r[7] at LC7_B34
--operation mode is normal
r[7]_lut_out = a[7] $ A1L93 $ sign1 $ b[7];
r[7] = DFFEA(r[7]_lut_out, GLOBAL(clk), , , , , );
--A1L06Q is r[7]~63 at LC7_B34
--operation mode is normal
A1L06Q = r[7];
--carryout is carryout at LC4_B34
--operation mode is normal
carryout_lut_out = a[7] & (A1L93 # sign1 $ b[7]) # !a[7] & A1L93 & (sign1 $ b[7]);
carryout = DFFEA(carryout_lut_out, GLOBAL(clk), , , , , );
--A1L32Q is carryout~0 at LC4_B34
--operation mode is normal
A1L32Q = carryout;
--A1L91 is b_data[7]~44 at LC2_B37
--operation mode is normal
A1L91 = sign1 $ b[7];
--A1L02 is b_data[7]~45 at LC2_B37
--operation mode is normal
A1L02 = sign1 $ b[7];
--A1L24 is process1~3 at LC1_B37
--operation mode is normal
A1L24 = sign & (a[7] & A1L91 & !r[7] # !a[7] & !A1L91 & r[7]);
--A1L34 is process1~80 at LC1_B37
--operation mode is normal
A1L34 = sign & (a[7] & A1L91 & !r[7] # !a[7] & !A1L91 & r[7]);
--A1L96 is s~9 at LC4_B37
--operation mode is normal
A1L96 = r[7] & sign;
--A1L07 is s~10 at LC4_B37
--operation mode is normal
A1L07 = r[7] & sign;
--A1L72 is co[0]~662 at LC2_B35
--operation mode is normal
A1L72 = b[0] & (ci # a[0]) # !b[0] & (sign1 # ci & a[0]);
--A1L82 is co[0]~670 at LC2_B35
--operation mode is normal
A1L82 = b[0] & (ci # a[0]) # !b[0] & (sign1 # ci & a[0]);
--A1L92 is co[1]~663 at LC5_B47
--operation mode is normal
A1L92 = a[1] & (A1L72 # sign1 $ b[1]) # !a[1] & A1L72 & (sign1 $ b[1]);
--A1L03 is co[1]~671 at LC5_B47
--operation mode is normal
A1L03 = a[1] & (A1L72 # sign1 $ b[1]) # !a[1] & A1L72 & (sign1 $ b[1]);
--A1L13 is co[2]~664 at LC6_B47
--operation mode is normal
A1L13 = a[2] & (A1L92 # sign1 $ b[2]) # !a[2] & A1L92 & (sign1 $ b[2]);
--A1L23 is co[2]~672 at LC6_B47
--operation mode is normal
A1L23 = a[2] & (A1L92 # sign1 $ b[2]) # !a[2] & A1L92 & (sign1 $ b[2]);
--A1L33 is co[3]~665 at LC3_B47
--operation mode is normal
A1L33 = a[3] & (A1L13 # sign1 $ b[3]) # !a[3] & A1L13 & (sign1 $ b[3]);
--A1L43 is co[3]~673 at LC3_B47
--operation mode is normal
A1L43 = a[3] & (A1L13 # sign1 $ b[3]) # !a[3] & A1L13 & (sign1 $ b[3]);
--A1L53 is co[4]~666 at LC1_B34
--operation mode is normal
A1L53 = a[4] & (A1L33 # sign1 $ b[4]) # !a[4] & A1L33 & (sign1 $ b[4]);
--A1L63 is co[4]~674 at LC1_B34
--operation mode is normal
A1L63 = a[4] & (A1L33 # sign1 $ b[4]) # !a[4] & A1L33 & (sign1 $ b[4]);
--A1L73 is co[5]~667 at LC2_B34
--operation mode is normal
A1L73 = a[5] & (A1L53 # sign1 $ b[5]) # !a[5] & A1L53 & (sign1 $ b[5]);
--A1L83 is co[5]~675 at LC2_B34
--operation mode is normal
A1L83 = a[5] & (A1L53 # sign1 $ b[5]) # !a[5] & A1L53 & (sign1 $ b[5]);
--A1L93 is co[6]~668 at LC6_B34
--operation mode is normal
A1L93 = a[6] & (A1L73 # sign1 $ b[6]) # !a[6] & A1L73 & (sign1 $ b[6]);
--A1L04 is co[6]~676 at LC6_B34
--operation mode is normal
A1L04 = a[6] & (A1L73 # sign1 $ b[6]) # !a[6] & A1L73 & (sign1 $ b[6]);
--A1L16 is reduce_nor~47 at LC6_B35
--operation mode is normal
A1L16 = !r[4] & !r[5] & !r[6] & !r[7];
--A1L36 is reduce_nor~51 at LC6_B35
--operation mode is normal
A1L36 = !r[4] & !r[5] & !r[6] & !r[7];
--A1L46 is reduce_nor~52 at LC6_B35
--operation mode is normal
A1L46 = !r[4] & !r[5] & !r[6] & !r[7];
--A1L26 is reduce_nor~49 at LC7_B35
--operation mode is normal
A1L26 = (!r[0] & !r[1] & !r[2] & !r[3]) & CASCADE(A1L46);
--A1L56 is reduce_nor~53 at LC7_B35
--operation mode is normal
A1L56 = (!r[0] & !r[1] & !r[2] & !r[3]) & CASCADE(A1L46);
--sign is sign at PIN_94
--operation mode is input
sign = INPUT();
--a[7] is a[7] at PIN_75
--operation mode is input
a[7] = INPUT();
--sign1 is sign1 at PIN_95
--operation mode is input
sign1 = INPUT();
--b[7] is b[7] at PIN_61
--operation mode is input
b[7] = INPUT();
--ci is ci at PIN_93
--operation mode is input
ci = INPUT();
--b[0] is b[0] at PIN_53
--operation mode is input
b[0] = INPUT();
--a[0] is a[0] at PIN_67
--operation mode is input
a[0] = INPUT();
--clk is clk at PIN_79
--operation mode is input
clk = INPUT();
--b[1] is b[1] at PIN_54
--operation mode is input
b[1] = INPUT();
--a[1] is a[1] at PIN_68
--operation mode is input
a[1] = INPUT();
--b[2] is b[2] at PIN_55
--operation mode is input
b[2] = INPUT();
--a[2] is a[2] at PIN_69
--operation mode is input
a[2] = INPUT();
--b[3] is b[3] at PIN_56
--operation mode is input
b[3] = INPUT();
--a[3] is a[3] at PIN_70
--operation mode is input
a[3] = INPUT();
--b[4] is b[4] at PIN_57
--operation mode is input
b[4] = INPUT();
--a[4] is a[4] at PIN_71
--operation mode is input
a[4] = INPUT();
--b[5] is b[5] at PIN_58
--operation mode is input
b[5] = INPUT();
--a[5] is a[5] at PIN_73
--operation mode is input
a[5] = INPUT();
--b[6] is b[6] at PIN_60
--operation mode is input
b[6] = INPUT();
--a[6] is a[6] at PIN_74
--operation mode is input
a[6] = INPUT();
--y_out[0] is y_out[0] at PIN_7
--operation mode is output
y_out[0] = OUTPUT(r[0]);
--y_out[1] is y_out[1] at PIN_8
--operation mode is output
y_out[1] = OUTPUT(r[1]);
--y_out[2] is y_out[2] at PIN_9
--operation mode is output
y_out[2] = OUTPUT(r[2]);
--y_out[3] is y_out[3] at PIN_11
--operation mode is output
y_out[3] = OUTPUT(r[3]);
--y_out[4] is y_out[4] at PIN_12
--operation mode is output
y_out[4] = OUTPUT(r[4]);
--y_out[5] is y_out[5] at PIN_13
--operation mode is output
y_out[5] = OUTPUT(r[5]);
--y_out[6] is y_out[6] at PIN_14
--operation mode is output
y_out[6] = OUTPUT(r[6]);
--y_out[7] is y_out[7] at PIN_15
--operation mode is output
y_out[7] = OUTPUT(r[7]);
--co_out is co_out at PIN_17
--operation mode is output
co_out = OUTPUT(carryout);
--c is c at PIN_190
--operation mode is output
c = OUTPUT(A1L42Q);
--z is z at PIN_191
--operation mode is output
z = OUTPUT(A1L28);
--v is v at PIN_192
--operation mode is output
v = OUTPUT(A1L24);
--s is s at PIN_193
--operation mode is output
s = OUTPUT(A1L96);
--A1L42Q is carryout~1 at LC5_B34
--operation mode is normal
A1L42Q_lut_out = a[7] & (A1L93 # sign1 $ b[7]) # !a[7] & A1L93 & (sign1 $ b[7]);
A1L42Q = DFFEA(A1L42Q_lut_out, GLOBAL(clk), , , , , );
--A1L28 is z~0 at LC3_B35
--operation mode is normal
A1L28 = A1L26;
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