main.lss

AVR Mega88 + nRF24L01 wireless 2.4GHz >> Driver nRF24L01 >> AVRSTUDIO project

{
 384:	8d e2       	ldi	r24, 0x2D	; 45
 386:	84 b9       	out	0x04, r24	; 4
    // Set MOSI, SCK and ENB output, all other input
    DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS)|(1<<DD_SIGNAL);

    // Enable SPI, Master, set clock rate fck/64 
    SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
 388:	81 e5       	ldi	r24, 0x51	; 81
 38a:	8c bd       	out	0x2c, r24	; 44
 38c:	08 95       	ret

0000038e <CSN_HIGH>:
}

unsigned char SPI_Send_command_without_ADDR (unsigned char cmd, unsigned char data_byte)
{
    unsigned char temp = 0;
    CSN_LOW();
    if (cmd == R_RX_PAYLOAD)
    {
        status = SPI_SendByte(cmd);
        temp = SPI_SendByte(NRF_NOP);
        CSN_HIGH();
        return temp;
    }
    if (cmd == W_TX_PAYLOAD)
    {
        status = SPI_SendByte(cmd);
        SPI_SendByte(data_byte);
        CSN_HIGH();
        return status;
    }
    status = SPI_SendByte(cmd);
    CSN_HIGH();
    return status;

}


void NRF_init (void)
{
    CE_LOW();
    delay_us(10);
    CSN_HIGH();

    ///////////////////////////
    // Configure chip nRF24L01
    ///////////////////////////

    // Discard transmission


    //Write CONFIG register (addres - 0x00)

    usart_puts("\n\r ** NRF_init **  \n\r"); 
    status = SPI_Send_command_with_ADDR(W_REGISTER, CONFIG_REG_ADDR, 0x0B);
    usart_SendBcd(status);
    //Write RX_ADDR_P0 register -> Set receive address data Pipe0 -> address in RX_ADDRESS_P0 array
    status = SPI_Send_command_with_ADDR(W_REGISTER, RX_ADDR_P0, NRF_NOP);
    usart_SendBcd(status);
    //Write RX_ADDR_P1 register -> Set receive address data Pipe1 -> address in RX_ADDRESS_P1 array
    status = SPI_Send_command_with_ADDR(W_REGISTER, RX_ADDR_P1, NRF_NOP);
    usart_SendBcd(status);
    //Write TX_ADDR register -> Transmit address. Used for a PTX device only. Address in TX_ADDRESS array
    status = SPI_Send_command_with_ADDR(W_REGISTER, TX_ADDR, NRF_NOP);
    usart_SendBcd(status);
    //Write RX_PW_P0 register -> Set number of bytes in RX payload in data pipe0 -> 1 byte
    status = SPI_Send_command_with_ADDR(W_REGISTER, RX_PW_P0, 1);
    usart_SendBcd(status);
    //Write RX_PW_P1 register -> Set number of bytes in RX payload in data pipe1 -> 1 byte
    status = SPI_Send_command_with_ADDR(W_REGISTER, RX_PW_P1, 1);
    usart_SendBcd(status);

    usart_puts("\n\r");
    
    NRF_prepareForReceive ();
}




/**
 * Send one byte to the air via chip nRF24L01.
 * Addresses are hardcoded:
 * @see RX_ADDRESS_P0 RX_ADDRESS_P1 TX_ADDRESS
 *
 * @param byte The data byte to send.
 */
void NRF_send (unsigned char dataIn)
{
    //unsigned char status_temp;

    // Chip enable low
//    printf(bputc," Test Send ");
    CE_LOW();

    // Setting for TX device
    // Write CONFIG register -> 00001010 - CRC enable, power-up, TX
    status = SPI_Send_command_with_ADDR (W_REGISTER,CONFIG_REG_ADDR, 0x0A);
    //printf(bputc,"%2X",status);

    // Send payload - send any data
    status = SPI_Send_command_without_ADDR (W_TX_PAYLOAD, dataIn);
    //printf(bputc,"%2X",status);

    // Pulse for CE -> starts the transmission.
    CE_HIGH();
    CE_LOW();

    // Read STATUS register
    status = SPI_Send_command_without_ADDR(NRF_NOP, NRF_NOP);
    //printf(bputc,"%2X",status);

    // if exceed number of transmision packets
    if ((status & MAX_RT) != 0) 
    {

        // Clear MAX_RT bit in status register
        status_temp = SPI_Send_command_with_ADDR(W_REGISTER, STATUS_ADDR, (status|MAX_RT));
        //printf(bputc,"%2X",status_temp);

        // No communication event here
//        LCD_printf ("MAX_RT\n");

        // Flush TX FIFO (in TX mode)
        status_temp = SPI_Send_command_without_ADDR(FLUSH_TX, NRF_NOP); // XXX test code
        //printf(bputc,"%2X",status_temp);
    }

    // If packet sent on TX
    if ((status & TX_DS) != 0) 
    {
        // Clear TX_DS bit in status register
        status_temp = SPI_Send_command_with_ADDR(W_REGISTER, STATUS_ADDR, (status|TX_DS));
        //printf(bputc,"%2X",status_temp);

        // Your code here
        //LCD_printf ("TX_DS\n");
    }

    // If TX full
    if ((status & TX_FULL) != 0)
    {
        // Flush TX FIFO (in TX mode)
        status_temp = SPI_Send_command_without_ADDR(FLUSH_TX, NRF_NOP);
        //printf(bputc,"%2X",status_temp);

        // Your code here
        // ...
        //LCD_printf ("TX_FULL\n");
    }

}




/**
 * After sending a byte you may set the device to RX mode.
 */
void NRF_prepareForReceive (void)
{
    // Setting for RX device
    //Write CONFIG register -> 00001010 - CRC enable, power-up, RX
    status = SPI_Send_command_with_ADDR(W_REGISTER,CONFIG_REG_ADDR, 0x0B);
    //printf(bputc," \n\r prepare for recieve %2X",status);
  
}

/**
 * Receive one byte from the air via chip nRF24L01. 
 * Addresses are hardcoded:
 * @see RX_ADDRESS_P0 RX_ADDRESS_P1 TX_ADDRESS
 *
 * @param byte The data byte to receive.
 * @return TRUE: if byte succesfully received.
 *         FALSE: if no input data.
 */
unsigned char NRF_receive (unsigned char * dataIn)
{
    //unsigned char payload;
    //unsigned char status_temp;

    CE_HIGH ();
    if ( ((PORTB & 0b00000010)==0b00000000)) // check interrupt line of nRF24L01...
    {
        // Read STATUS status register
        status = SPI_Send_command_without_ADDR(NRF_NOP, NRF_NOP);
        // Set high when new data arrives RX FIFO
        if ((status & RX_DR) != 0)
        {
            // Chip enable low
            CE_LOW();

            //Read payload data
            payload = SPI_Send_command_without_ADDR(R_RX_PAYLOAD, NRF_NOP);
            usart_putc(payload);
            // Clear RX_DR bit in status register
            status_temp = SPI_Send_command_with_ADDR(W_REGISTER, STATUS_ADDR, (status|RX_DR));
            // Flush RX FIFO
            status_temp = SPI_Send_command_without_ADDR(FLUSH_RX, NRF_NOP); // XXX test code
            return TRUE;
        }
    }
    return FALSE;
}

unsigned char check_recieve_nrf24L01(void)
{
     CE_HIGH ();
	 if ( !chkbit(PIND,5) ) // check interrupt line of nRF24L01...
     {
	    sbi(PORTB,0);
		do{
        	status = SPI_Send_command_without_ADDR(NRF_NOP, NRF_NOP);
        	if ((status & RX_DR) != 0)
        	{
            	CE_LOW();
            	payload = SPI_Send_command_without_ADDR(R_RX_PAYLOAD, NRF_NOP);
            	usart_putc(payload);
            	status_temp = SPI_Send_command_with_ADDR(W_REGISTER, STATUS_ADDR, (status|RX_DR));
			}
            status_temp = SPI_Send_command_without_ADDR(FLUSH_RX, NRF_NOP); // XXX test code           
        }while( !chkbit(PIND,5) );
	    cbi(PORTB,0);       

        NRF_prepareForReceive ();

		return TRUE;
     }

	 return FALSE;
}	


void CSN_HIGH(void)
{
 38e:	5f 9a       	sbi	0x0b, 7	; 11
 390:	08 95       	ret

00000392 <CE_LOW>:
	sbi(nRF24L01_PORT,nRF24L01_CSN);
}

void CSN_LOW (void)
{ 
    delay_us(CSN_TIME);
	cbi(nRF24L01_PORT,nRF24L01_CSN);
}

void CE_HIGH(void)
{ 
	sbi(nRF24L01_PORT,nRF24L01_CE);
    delay_us(CE_HIGH_TIME); 
}

void CE_LOW(void)
{
 392:	5e 98       	cbi	0x0b, 6	; 11
 394:	08 95       	ret

00000396 <CE_HIGH>:
 396:	5e 9a       	sbi	0x0b, 6	; 11
 398:	8c eb       	ldi	r24, 0xBC	; 188
 39a:	92 e0       	ldi	r25, 0x02	; 2
 39c:	ab df       	rcall	.-170    	; 0x2f4 <delay_us>
 39e:	08 95       	ret

000003a0 <CSN_LOW>:
 3a0:	84 e1       	ldi	r24, 0x14	; 20
 3a2:	90 e0       	ldi	r25, 0x00	; 0
 3a4:	a7 df       	rcall	.-178    	; 0x2f4 <delay_us>
 3a6:	5f 98       	cbi	0x0b, 7	; 11
 3a8:	08 95       	ret

000003aa <SPI_Send_command_without_ADDR>:
 3aa:	0f 93       	push	r16
 3ac:	1f 93       	push	r17
 3ae:	18 2f       	mov	r17, r24
 3b0:	06 2f       	mov	r16, r22
 3b2:	f6 df       	rcall	.-20     	; 0x3a0 <CSN_LOW>
 3b4:	11 36       	cpi	r17, 0x61	; 97
 3b6:	81 f4       	brne	.+32     	; 0x3d8 <SPI_Send_command_without_ADDR+0x2e>
 3b8:	1e bd       	out	0x2e, r17	; 46
 3ba:	0d b4       	in	r0, 0x2d	; 45
 3bc:	07 fe       	sbrs	r0, 7
 3be:	fd cf       	rjmp	.-6      	; 0x3ba <SPI_Send_command_without_ADDR+0x10>
 3c0:	8e b5       	in	r24, 0x2e	; 46
 3c2:	99 27       	eor	r25, r25
 3c4:	80 93 c0 01 	sts	0x01C0, r24
 3c8:	8f ef       	ldi	r24, 0xFF	; 255
 3ca:	8e bd       	out	0x2e, r24	; 46
 3cc:	0d b4       	in	r0, 0x2d	; 45
 3ce:	07 fe       	sbrs	r0, 7
 3d0:	fd cf       	rjmp	.-6      	; 0x3cc <SPI_Send_command_without_ADDR+0x22>
 3d2:	8e b5       	in	r24, 0x2e	; 46
 3d4:	5f 9a       	sbi	0x0b, 7	; 11
 3d6:	1b c0       	rjmp	.+54     	; 0x40e <SPI_Send_command_without_ADDR+0x64>
 3d8:	10 3a       	cpi	r17, 0xA0	; 160
 3da:	71 f4       	brne	.+28     	; 0x3f8 <SPI_Send_command_without_ADDR+0x4e>
 3dc:	1e bd       	out	0x2e, r17	; 46
 3de:	0d b4       	in	r0, 0x2d	; 45
 3e0:	07 fe       	sbrs	r0, 7
 3e2:	fd cf       	rjmp	.-6      	; 0x3de <SPI_Send_command_without_ADDR+0x34>
 3e4:	8e b5       	in	r24, 0x2e	; 46
 3e6:	99 27       	eor	r25, r25
 3e8:	80 93 c0 01 	sts	0x01C0, r24
 3ec:	0e bd       	out	0x2e, r16	; 46
 3ee:	0d b4       	in	r0, 0x2d	; 45
 3f0:	07 fe       	sbrs	r0, 7
 3f2:	fd cf       	rjmp	.-6      	; 0x3ee <SPI_Send_command_without_ADDR+0x44>
 3f4:	8e b5       	in	r24, 0x2e	; 46
 3f6:	08 c0       	rjmp	.+16     	; 0x408 <SPI_Send_command_without_ADDR+0x5e>
 3f8:	1e bd       	out	0x2e, r17	; 46
 3fa:	0d b4       	in	r0, 0x2d	; 45
 3fc:	07 fe       	sbrs	r0, 7
 3fe:	fd cf       	rjmp	.-6      	; 0x3fa <SPI_Send_command_without_ADDR+0x50>
 400:	8e b5       	in	r24, 0x2e	; 46
 402:	99 27       	eor	r25, r25
 404:	80 93 c0 01 	sts	0x01C0, r24
 408:	5f 9a       	sbi	0x0b, 7	; 11
 40a:	80 91 c0 01 	lds	r24, 0x01C0
 40e:	99 27       	eor	r25, r25
 410:	1f 91       	pop	r17
 412:	0f 91       	pop	r16
 414:	08 95       	ret

00000416 <SPI_Send_command_with_ADDR>:
 416:	ff 92       	push	r15
 418:	0f 93       	push	r16
 41a:	1f 93       	push	r17
 41c:	cf 93       	push	r28
 41e:	df 93       	push	r29
 420:	cd b7       	in	r28, 0x3d	; 61
 422:	de b7       	in	r29, 0x3e	; 62
 424:	21 97       	sbiw	r28, 0x01	; 1
 426:	0f b6       	in	r0, 0x3f	; 63
 428:	f8 94       	cli
 42a:	de bf       	out	0x3e, r29	; 62
 42c:	0f be       	out	0x3f, r0	; 63
 42e:	cd bf       	out	0x3d, r28	; 61
 430:	08 2f       	mov	r16, r24
 432:	f4 2e       	mov	r15, r20
 434:	18 2f       	mov	r17, r24
 436:	12 95       	swap	r17
 438:	11 0f       	add	r17, r17
 43a:	10 7e       	andi	r17, 0xE0	; 224
 43c:	16 2b       	or	r17, r22
 43e:	69 83       	std	Y+1, r22	; 0x01
 440:	af df       	rcall	.-162    	; 0x3a0 <CSN_LOW>
 442:	99 81       	ldd	r25, Y+1	; 0x01
 444:	00 23       	and	r16, r16
 446:	89 f5       	brne	.+98     	; 0x4aa <SPI_Send_command_with_ADDR+0x94>
 448:	89 2f       	mov	r24, r25