📄 dcc.c
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// resetting the Audio Engine(s) run = CPU_RESET; DCCSP(pDCC->pRUA, audio_engine0, RMAudioEnginePropertyID_State, &run, sizeof run); run = CPU_STOPPED; DCCSP(pDCC->pRUA, audio_engine0, RMAudioEnginePropertyID_State, &run, sizeof run);#ifdef RMFEATURE_HAS_AUDIO_ENGINE_1 run = CPU_RESET; DCCSP(pDCC->pRUA, audio_engine1, RMAudioEnginePropertyID_State, &run, sizeof run); run = CPU_STOPPED; DCCSP(pDCC->pRUA, audio_engine1, RMAudioEnginePropertyID_State, &run, sizeof run);#endif audio_size_in.MicrocodeVersion = 1; err = RUAExchangeProperty(pDCC->pRUA, audio_engine0, RMAudioEnginePropertyID_MicrocodeDRAMSize, &audio_size_in, sizeof(audio_size_in), &audio0_size_out, sizeof(audio0_size_out)); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "Error getting property RMAudioEnginePropertyID_MicrocodeDRAMSize! %s\n", RMstatusToString(err))); return err; } audio_size_out = audio0_size_out.Size;#ifdef RMFEATURE_HAS_AUDIO_ENGINE_1 audio_size_in.MicrocodeVersion = 1; err = RUAExchangeProperty(pDCC->pRUA, audio_engine1, RMAudioEnginePropertyID_MicrocodeDRAMSize, &audio_size_in, sizeof(audio_size_in), &audio1_size_out, sizeof(audio1_size_out)); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "Error getting property RMAudioEnginePropertyID_MicrocodeDRAMSize! %s\n", RMstatusToString(err))); return err; } audio_size_out += audio1_size_out.Size;#endif audio_ucode.MicrocodeVersion = audio_size_in.MicrocodeVersion; if (audio_size_out) { /* allocate only once per DCC instance */ if (!pDCC->audio_ucode_address) { pDCC->audio_ucode_address = pDCC->rua_malloc(pDCC->pRUA, audio_engine0, 0, RUA_DRAM_CACHED, audio_size_out); if (!pDCC->audio_ucode_address) { RMDBGLOG((ENABLE, "ERROR: could not allocate 0x%08lX bytes in cached DRAM %lu!\n", audio_size_out, 0L)); return RM_FATALOUTOFMEMORY; } } audio_ucode.Address = pDCC->audio_ucode_address; RMDBGLOG((LOCALDBG, "audio ucode cached addr: 0x%08lX, size 0x%08lX, end: 0x%08lX\n", audio_ucode.Address, audio_size_out, audio_ucode.Address + audio_size_out)); } else { audio_ucode.Address = 0; RMDBGLOG((LOCALDBG, "audio ucode doesn't need DRAM\n")); } DCCSP(pDCC->pRUA, audio_engine0, RMAudioEnginePropertyID_Microcode, &audio_ucode, sizeof(audio_ucode));#ifdef RMFEATURE_HAS_AUDIO_ENGINE_1 audio_ucode.Address = pDCC->audio_ucode_address + audio0_size_out.Size; DCCSP(pDCC->pRUA, audio_engine1, RMAudioEnginePropertyID_Microcode, &audio_ucode, sizeof(audio_ucode));#endif run = CPU_RUNNING; DCCSP(pDCC->pRUA, audio_engine0, RMAudioEnginePropertyID_State, &run, sizeof(run));#ifdef RMFEATURE_HAS_AUDIO_ENGINE_1 run = CPU_RUNNING; DCCSP(pDCC->pRUA, audio_engine1, RMAudioEnginePropertyID_State, &run, sizeof(run));#endif return err;}static RMstatus init_demux_microcode(struct DCC *pDCC){ enum ProcessorState run; RMstatus err = RM_OK; struct DemuxEngine_MicrocodeDRAMSize_in_type demux_size_in; struct DemuxEngine_MicrocodeDRAMSize_out_type demux_size_out; struct DemuxEngine_Microcode_type demux_ucode; RMuint32 demux_engine = EMHWLIB_MODULE(DemuxEngine, 0); RMDBGLOG((LOCALDBG, "dcc_init_demux_microcode DCC @ 0x%08lx\n", (RMuint32)pDCC)); run = CPU_RESET; DCCSP(pDCC->pRUA, demux_engine, RMDemuxEnginePropertyID_State, &run, sizeof run); run = CPU_STOPPED; DCCSP(pDCC->pRUA, demux_engine, RMDemuxEnginePropertyID_State, &run, sizeof run); demux_size_in.MicrocodeVersion = 1; err = RUAExchangeProperty(pDCC->pRUA, demux_engine, RMDemuxEnginePropertyID_MicrocodeDRAMSize, &demux_size_in, sizeof demux_size_in, &demux_size_out, sizeof demux_size_out); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "Error getting property RMDemuxEnginePropertyID_MicrocodeDRAMSize!%s\n", RMstatusToString(err))); return err; } demux_ucode.MicrocodeVersion = demux_size_in.MicrocodeVersion; if (demux_size_out.Size) { /* allocate only once per DCC instance */ if (!pDCC->demux_ucode_address) { pDCC->demux_ucode_address = pDCC->rua_malloc(pDCC->pRUA, demux_engine, 0, RUA_DRAM_CACHED, demux_size_out.Size); if (!pDCC->demux_ucode_address) { RMDBGLOG((ENABLE, "ERROR: could not allocate 0x%08lX bytes in cached DRAM %lu!\n", demux_size_out.Size, 0L)); return RM_FATALOUTOFMEMORY; } } demux_ucode.Address = pDCC->demux_ucode_address; RMDBGLOG((LOCALDBG, "demux ucode cached addr: 0x%08lX, size 0x%08lX, end: 0x%08lX\n", demux_ucode.Address, demux_size_out.Size, demux_ucode.Address + demux_size_out.Size)); } else { demux_ucode.Address = 0; RMDBGLOG((LOCALDBG, "demux ucode doesn't need DRAM\n")); } DCCSP(pDCC->pRUA, demux_engine, RMDemuxEnginePropertyID_Microcode, &demux_ucode, sizeof(demux_ucode)); // starting the Demux Engine run = CPU_RUNNING; DCCSP(pDCC->pRUA, demux_engine, RMDemuxEnginePropertyID_State, &run, sizeof(run)); return err;}#endif /* WITH_XLOADED_UCODE */RMstatus DCCInitSpecificMicroCode(struct DCC *pDCC, enum DCCMicrocode ucode){ RMstatus err = RM_OK;#ifdef WITH_XLOADED_UCODE RMDBGLOG((LOCALDBG, "DCCInitSpecificMicroCode: already loaded\n")); if (ucode==DCCMicrocode_Demux) DCCSP(pDCC->pRUA, EMHWLIB_MODULE(DemuxEngine, 0), RMDemuxEnginePropertyID_TimerInit, 0, 0); if (ucode==DCCMicrocode_Video) { DCCSP(pDCC->pRUA, EMHWLIB_MODULE(MpegEngine, 0), RMMpegEnginePropertyID_InitMicrocodeSymbols, 0, 0);#ifdef RMFEATURE_HAS_VIDEO_ENGINE_1 DCCSP(pDCC->pRUA, EMHWLIB_MODULE(MpegEngine, 1), RMMpegEnginePropertyID_InitMicrocodeSymbols, 0, 0);#endif } #else switch (ucode) { case DCCMicrocode_Video: err = init_video_microcode(pDCC); break; case DCCMicrocode_Audio: err = init_audio_microcode(pDCC); break; case DCCMicrocode_Demux: err = init_demux_microcode(pDCC); break; }#endif return err;}RMstatus DCCSetMemoryManager(struct DCC *pDCC, RMuint8 dram){ RMstatus err; RMuint32 category = MM; RMuint32 mm_instances = 0; RMASSERT(pDCC); err = RUAExchangeProperty(pDCC->pRUA, EMHWLIB_MODULE(Enumerator, 0), RMEnumeratorPropertyID_CategoryIDToNumberOfInstances, &category, sizeof(category), &mm_instances, sizeof(mm_instances)); if (err != RM_OK) { RMDBGLOG((ENABLE, "Cannot get memory manager count %d\n", err)); return RM_ERROR; } if (mm_instances <= dram) { RMDBGLOG((ENABLE, "Only %d Dram controller, cannot access Dram %d\n", mm_instances, dram)); return RM_ERROR; } pDCC->dram = dram; return RM_OK;}RMstatus DCCSetMemoryManagerCallbacks(struct DCC *pDCC, DCCAllocFunc alloc_cb, DCCFreeFunc free_cb){ if (alloc_cb == NULL) pDCC->rua_malloc = default_rua_malloc; else pDCC->rua_malloc = alloc_cb; if (free_cb == NULL) pDCC->rua_free = default_rua_free; else pDCC->rua_free = free_cb; return RM_OK;}RMuint32 DCCMalloc(struct DCC *pDCC, RMuint32 dramIndex, enum RUADramType dramtype, RMuint32 size){ return pDCC->rua_malloc(pDCC->pRUA, 0, dramIndex, dramtype, size);}void DCCFree(struct DCC *pDCC, RMuint32 ptr){ return pDCC->rua_free(pDCC->pRUA, ptr);}static RMstatus AddXferFifoForReceive(struct ReceiveObject_type *pReceive){ RMstatus err; struct AddXferFIFO_type XferFIFO; struct DRAMSizeXferFIFO_in_type dram_in; struct DRAMSizeXferFIFO_out_type dram_out; RMuint32 buffer_size = pReceive->buffer_count * (1<<pReceive->buffer_size_log2); dram_in.XferFIFOSize = buffer_size; dram_in.XferFIFOCount = pReceive->buffer_count; err = RUAExchangeProperty(pReceive->pRUA, pReceive->targetModule, RMGenericPropertyID_DRAMSizeXferFIFO, &dram_in, sizeof(dram_in), &dram_out, sizeof(dram_out)); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "AddXferFifoForReceive Error getting RMGenericPropertyID_DRAMSizeXferFIFO")); return RM_ERROR; } XferFIFO.XferFIFOSize = buffer_size; XferFIFO.XferFIFOCount = pReceive->buffer_count; XferFIFO.CachedSize = dram_out.CachedSize; XferFIFO.UncachedSize = dram_out.UncachedSize; // alloc cached memory if (dram_out.CachedSize > 0) { XferFIFO.CachedAddress = RUAMalloc(pReceive->pRUA, 0, RUA_DRAM_CACHED, dram_out.CachedSize); if (!XferFIFO.CachedAddress) { RMDBGLOG((ENABLE, "AddXferFifoForReceive ERROR: could not allocate 0x%08lX bytes for cached DRAM !\n", XferFIFO.CachedSize)); return RM_FATALOUTOFMEMORY; } RMDBGLOG((LOCALDBG, "AddXferFifoForReceive cached addr: 0x%08lX, size 0x%08lX, end: 0x%08lX\n", XferFIFO.CachedAddress, XferFIFO.CachedSize, XferFIFO.CachedAddress + XferFIFO.CachedSize)); } pReceive->CachedAddr = XferFIFO.CachedAddress; // alloc uncached memory if (dram_out.UncachedSize > 0) { XferFIFO.UncachedAddress = RUAMalloc(pReceive->pRUA, 0, RUA_DRAM_UNCACHED, dram_out.UncachedSize); if (!XferFIFO.UncachedAddress) { RMDBGLOG((ENABLE, "AddXferFifoForReceive ERROR: could not allocate 0x%08lX bytes for uncached DRAM !\n", XferFIFO.UncachedSize)); return RM_FATALOUTOFMEMORY; } RMDBGLOG((LOCALDBG, "AddXferFifoForReceive uncached addr: 0x%08lX, size 0x%08lX, end: 0x%08lX\n", XferFIFO.UncachedAddress, XferFIFO.UncachedSize, XferFIFO.UncachedAddress + XferFIFO.UncachedSize)); } pReceive->UncachedAddr = XferFIFO.UncachedAddress; err = RUASetProperty(pReceive->pRUA, pReceive->targetModule, RMGenericPropertyID_AddXferFIFO, &XferFIFO, sizeof(XferFIFO), 0); err = RUAOpenPool(pReceive->pRUA, RUA_POOL_FORCE_DRAM_COPY | pReceive->targetModule, pReceive->buffer_count, pReceive->buffer_size_log2, RUA_POOL_DIRECTION_RECEIVE, &pReceive->pDMA); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "AddXferFifoForReceive Error opening RUA_POOL_DIRECTION_RECEIVE\n")); return RM_ERROR; } return err;}/* to be removed in next step of cleanup */RMstatus DCCOpenReceive(struct Receive_type *Receive, struct ReceiveObject_type **ppR, struct RUABufferPool **ppDma){ RMstatus err; struct ReceiveObject_type *pR; pR = (struct ReceiveObject_type *) RMMalloc(sizeof(struct ReceiveObject_type)); if (pR == NULL) { return RM_FATALOUTOFMEMORY; } RMMemset(pR, 0, sizeof(struct ReceiveObject_type)); RMMemcpy(pR, Receive, sizeof(struct Receive_type)); err = AddXferFifoForReceive(pR); *ppDma = pR->pDMA; *ppR = pR; return err;}RMstatus DCCCloseReceive(struct ReceiveObject_type *pR){ RMstatus err = RM_OK; if (pR->pDMA) { err = RUAClosePool(pR->pDMA); pR->pDMA = NULL; if (RMFAILED(err)) { RMDBGLOG((ENABLE, "DCCCloseReceive Error closing DMA pool: %d\n", err)); } } if (pR->CachedAddr) { RUAFree(pR->pRUA, pR->CachedAddr); pR->CachedAddr = 0; } if (pR->UncachedAddr) { RUAFree(pR->pRUA, pR->UncachedAddr); pR->UncachedAddr = 0; } RMFree(pR); return err;}RMstatus DCCGetReceiveEvent(struct ReceiveObject_type *pR, struct RUAEvent* pEvent){ pEvent->ModuleID = EMHWLIB_MODULE(EMHWLIB_MODULE_CATEGORY(pR->targetModule), EMHWLIB_MODULE_INDEX(pR->targetModule)); // remove the target //TODO depending on target and module Id get the correct event switch (EMHWLIB_MODULE_CATEGORY(pR->targetModule)) { case VideoDecoder: pEvent->Mask = SOFT_IRQ_EVENT_XFER_RECEIVE_READY; // SOFT_IRQ_EVENT_USER_DATA break; case DispVideoInput: case DispGraphicInput: pEvent->Mask = RUAEVENT_XFER_FIFO_READY; break; default: return RM_ERROR; } return RM_OK;}RMstatus DCCResetReceive(struct ReceiveObject_type *pR){ RMstatus err = RM_OK; if (pR->pDMA) { err = RUAResetPool(pR->pDMA); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "Error reseting demux Pid DMA pool: %d\n", err)); } err = RUAPreparePoolForReceiveData(pR->pDMA); if (RMFAILED(err)) { RMDBGLOG((ENABLE, "Error preparing demux Pid DMA pool: %d\n", err)); } } return err;}
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