tw9919eid.c

Sample code for use on smp 863x processor.

#include "tw9919eid.h"
#include "i2c.h"
RMuint8 TW9919E_CCIR_NTSC_DataSet[][2] = {			
	
	//	 {0x02, 0x70},		// for 27MHz PLL unstable on power reset time
	{0x81, 0x09},		// for MCLK unstable
	{0x03, 0xa2},
	{0x05, 0x00},		// for RevE
	{0x09, 0xf6},
//	{0x0a, 0x21},		// For adjusting H position	
	{0x0a, 0xf},		// For adjusting H position	
	{0x0f, 0x1},		
	{0x12, 0x12},
	{0x19, 0x57},
//	{0x19, 0x5f},
	{0x1a, 0x07},
//	{0x1b, 0x20},		// for RevE clk2--> vclk, clk1 --> clkx1(freerun)
	{0x1b, 0x10}, //A Tho
	{0x21, 0x62},		//for white saturation on low sync level
	//	{0x23, 0xec},		//for RevE, use default value(0xd8)
	{0x23, 0xd8},		// Not sure 
	{0x28, 0x02},		//for solve from even/odd switch suddenly
	{0x29, 0x02},		//Changed for v-sync out scheme
	{0x2d, 0x54},		// for prevent field error on bad tape
	{0x33, 0x08},		//for improving HV shaking on week signal
//	{0x33, 0x05}, //dung huynh restore default value
	{0x36, 0x00},
//	{0x39, 0x0b},
	{0x39, 0x02}, //A Tho

	{0x55, 0x10},
	{0x6b, 0x26},
	{0x6c, 0x36},
	{0x6d, 0x25},		//Changed for v-sync out scheme
	{0x6e, 0x40},		//Changed for v-sync out scheme
//	{0x70, 0x0a},		// for RevE
	{0x70, 0x07}, //A Tho
	{0x73, 0xc0}, //A Tho
	{0x75, 0x04},		// for RevE
	{0x76, 0x95}, //A Tho
	{0x81, 0x08},
	{0x06, 0x80},	// Reset .	

};


RMuint8 TW9919E_CCIR_PAL_DataSet[][2] = {		
	//	 {0x02, 0x70},		// for PLL unstable on power reset time
	{0x81, 0x09},		// for MCLK unstable
	{0x03, 0xa2},
	{0x05, 0x88},		// for RevE (Not sure )
//	{0x0a, 0x16},		// For adjusting H position
	{0x0a, 0xf},		// For adjusting H position
	{0x0f, 0x1},		
	{0x12, 0x12},
	{0x19, 0x57},
	{0x1a, 0x07},
//	{0x1b, 0x20},		// for RevE clk2--> vclk, clk1 --> clkx1(freerun)
	{0x1b, 0x10}, //A Tho
	{0x21, 0x62},		//for white saturation on low sync level
	//	{0x23, 0xec},		//for RevE, use default value(0xd8)
	{0x23, 0xd8},		// Not sure 
	{0x28, 0x02},		//for solve from even/odd switch suddenly
	{0x29, 0x02},		//Changed for v-sync out scheme
	{0x2d, 0x54},		// for prevent field error on bad tape
	{0x33, 0x08},		//for improving HV shaking on week signal
//	{0x33, 0xc8},
	{0x36, 0x00},
//	{0x39, 0x0b},
	{0x39, 0x02}, //A Tho
	{0x6b, 0x26},
	{0x6c, 0x36},
//	{0x6d, 0x25},		//Changed for v-sync out scheme
//	{0x6e, 0x40},		//Changed for v-sync out scheme
	{0x6d, 0x00},		//Changed for v-sync out scheme
	{0x6e, 0x20},		//Changed for v-sync out scheme
//	{0x70, 0x0a},		// for RevE
	{0x70, 0x07}, //A Tho
	{0x73, 0xc0}, //A Tho
	{0x75, 0x04},		// for RevE
	{0x76, 0x95}, //A Tho
	{0x81, 0x08},
	{0x06, 0x80},	//Reset			

	//
};

//Audio clock generation for frequency of 27 Mhz :

RMuint8 TW9919E_AMCLK_48KHZ_NTSC[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x15},
	{0x41,	0x41},
	{0x42,	0x3a},
	//ACKN 0x43 - 0x45
	{0x43,	0xcd},
	{0x44,	0x20},
	{0x45,	0x03},
};

RMuint8 TW9919E_AMCLK_48KHZ_PAL[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x15},
	{0x41,	0x41},
	{0x42,	0x3a},
	//ACKN 0x43 - 0x45
	{0x43,	0x00},
	{0x44,	0xc0},
	{0x45,	0x03},
};
RMuint8 TW9919E_AMCLK_44KHZ_NTSC[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x65},
	{0x41,	0x85},
	{0x42,	0x35},
	//ACKN 0x43 - 0x45
	{0x43,	0xbc},
	{0x44,	0xdf},
	{0x45,	0x02},
};

RMuint8 TW9919E_AMCLK_44KHZ_PAL[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x65},
	{0x41,	0x85},
	{0x42,	0x35},
	//ACKN 0x43 - 0x45
	{0x43,	0x00},
	{0x44,	0x72},
	{0x45,	0x03},
};

RMuint8 TW9919E_AMCLK_32KHZ_NTSC[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x0e},
	{0x41,	0xd6},
	{0x42,	0x26},
	//ACKN 0x43 - 0x45
	{0x43,	0xde},
	{0x44,	0x15},
	{0x45,	0x02},
};

RMuint8 TW9919E_AMCLK_32KHZ_PAL[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x0e},
	{0x41,	0xd6},
	{0x42,	0x26},
	//ACKN 0x43 - 0x45
	{0x43,	0x00},
	{0x44,	0x80},
	{0x45,	0x02},
};

RMuint8 TW9919E_AMCLK_8KHZ_NTSC[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x83},
	{0x41,	0xb5},
	{0x42,	0x09},
	//ACKN 0x43 - 0x45
	{0x43,	0x78},
	{0x44,	0x85},
	{0x45,	0x00},
};

RMuint8 TW9919E_AMCLK_8KHZ_PAL[][2]={
	//ACKI 0x40 - 0x42
	{0x40,	0x83},
	{0x41,	0xb5},
	{0x42,	0x09},
	//ACKN 0x43 - 0x45
	{0x43,	0x00},
	{0x44,	0xa0},
	{0x45,	0x00},
};
RMuint8 TW9919E_CC_Enable[][2] = {			// Enable NTSC ClosedCaption slicing
	
	{0x19, 0xd7},	//enable VBI raw
	{0x52, 0xa1},  // anc data output
	{0x6f, 0x91},  // VBIDELAY- Enbalbe VBI data slicer
	{0x6e, 0x00}, 	
	{0xa5, 0x80}, 	
	
	
	{0x56, 0x00},  // lines 6 / 
	{0x57, 0x00},  // lines 7 / 
	{0x58, 0x00},  // lines 8 / 
	{0x59, 0x00},  // lines 9 /
	{0x5a, 0x00},  // lines 10 / 
	{0x5b, 0x00},  // lines 11 / 
	{0x5c, 0x00},  // lines 12 / 
	{0x5d, 0x00},  // lines 13 / 
	{0x5e, 0x00},  // lines 14 / 
	{0x5f, 0x00},  // lines 15 / 
	{0x60, 0x00},  // lines 16 / 
	{0x61, 0x00},  // lines 17 / 
	{0x62, 0x00},  // lines 18 / 
	{0x63, 0x00},  // lines 19 / 
	{0x64, 0x00},  // lines 20 / 
	{0x65, 0x40},  // lines 21 / 
	
	{0x66, 0x00},  // lines 22 / 
	{0x67, 0x00},  // lines 23 / 
	{0x68, 0x00},  // lines 24 /
	{0x69, 0x00},  // lines 25 / 
	{0x6a, 0x00},  // lines 26 / 
	
};
RMuint8 TW9919E_TT_Enable[][2] = {  // Enable PAL TeleText slicing
	
	{0x19, 0xd7},	//enable VBI raw
	{0x52, 0xb1},  // anc data output
	{0x6f, 0x91},  // VBIDELAY- Enbalbe VBI data slicer
	{0x6e, 0x00}, 
};
RMuint8 TW9919E_TT_B[][2] = {  // Enable TeleText system B (WST)	
	
	{0xab, 0xb0},
//	{0x55, 0x20},  //hamming check
	{0xa5, 0xb8},
	
	{0x56, 0x11},  // lines 6 / 320
	{0x57, 0x11},  // lines 7 / 321
	{0x58, 0x11},  // lines 8 / 322
	{0x59, 0x11},  // lines 9 / 323
	{0x5a, 0x11},  // lines 10 / 324
	{0x5b, 0x11},  // lines 11 / 325
	{0x5c, 0x11},  // lines 12 / 326
	{0x5d, 0x11},  // lines 13 / 327
	{0x5e, 0x11},  // lines 14 / 328
	{0x5f, 0x11},  // lines 15 / 329
	{0x60, 0x11},  // lines 16 / 330
	{0x61, 0x11},  // lines 17 / 331
	{0x62, 0x11},  // lines 18 / 332
	{0x63, 0x11},  // lines 19 / 333
	{0x64, 0x11},  // lines 20 / 334
	{0x65, 0x11},  // lines 21 / 335
	{0x66, 0xff},  // lines 22 / 336
	{0x67, 0xff},  // lines 23 / 337
	{0x68, 0xff},  // lines 24 / 338
	{0x69, 0xff},  // lines 25 / 339
	{0x6a, 0xff},  // lines 26 / 340
	
	
};
//sizeOfRam = {16,32,64} MB
RMstatus tw9919eid_setSizeOfSDRAM(struct RUA *pInstance,RMuint8 delay,RMuint32 dev,RMuint8 sizeOfRam) 
{
	RMstatus err=RM_OK;
	RMuint32 regAddr=0x00;
	RMuint32 regValue=0x00;

	regAddr=0x72;
	err = read_i2c(pInstance,delay,dev,regAddr,&regValue);	
	if (err!=RM_OK) {
		printf("setSizeOfSDRAM Error <1>  \n");
		return err;
	}
	switch(sizeOfRam){
	case 16:		
		err=write_i2c(pInstance,delay,dev,regAddr,regValue & 0xe7);
		if (err!=RM_OK) {
			printf("setSizeOfSDRAM Error 2 \n");
			return err;
		}
		break;
	case 32:	
		
		err=write_i2c(pInstance,delay,dev,regAddr,(regValue & 0xef)|0x08);
		if (err!=RM_OK) {
			printf("setSizeOfSDRAM Error 3 \n");
			return err;
		}
		
		break;
	default: 		
		printf("Only support 16,32,64 MB SD Ram. 64 Mb by default ! \n");
	case 64:	//64 MB SD RAM	
		regValue &= 0xf7;
		regValue |=0x10;
		err=write_i2c(pInstance,delay,dev,regAddr,regValue);
		if (err!=RM_OK) {
			printf("setSizeOfSDRAM Error 4 \n");
			return err;
		}		
		break;
	}
	return err;
}

	/*
	 	1 : Capture CVBS port
		2 : Capture S-Video port
	 */
RMstatus tw9919eid_setCapturePort(struct RUA *pInstance, RMuint8 dev, RMuint8 delay,RMuint8 port)
{
	RMstatus err=RM_OK;
	//	RMuint32 regValue=0;
	switch (port) {
				case 1:      	
					err = write_i2c(pInstance, delay, dev, 0x02,0x41 ); //dh capture cvbs .
					//					err = write_i2c(pInstance, delay, dev, 0x39,0x02 ); //dh 
					break;
				case 2:    
					err = write_i2c(pInstance, delay, dev, 0x02,0x55 ); //dh 					
					//					err = write_i2c(pInstance, delay, dev, 0x39,0x02 ); //dh 
					break;
				case 3:    
					err = write_i2c(pInstance, delay, dev, 0x02,0x49 ); 
					//err = write_i2c(pInstance, delay, dev, 0x39,0x02 ); //dh 
					break;
					

				default: 
					printf("Only support CVBS and S-Video Capture Port ! CVBS By default !\n");
					err = write_i2c(pInstance, delay, dev, 0x02,0x41 ); //dh capture cvbs .
					//					err = write_i2c(pInstance, delay, dev, 0x39,0x02 ); //dh 
					//					err = RM_ERROR;
					break;
				}
	usleep(50);	
	return err;
}

RMuint8 tw9919eid_isVideoIn(struct RUA *pInstance, RMuint8 dev, RMuint8 delay)
{
	RMuint8 retValue=1;
	RMuint32 regValue=0;
	if (RMFAILED(read_i2c(pInstance, delay, dev, 0x01, &regValue))) {
		fprintf(stderr, "tw9919eid_isVideoIn() failed to read reg 0x01\n");
		return -1; //Error .
	}
	if ((regValue & 0x80)) {
		retValue=0;//No video in.
	}
	return retValue;
}

RMuint8 tw9919eid_isStandardSignal(struct RUA *pInstance, RMuint8 dev, RMuint8 delay)
{
	RMstatus err=RM_OK;
	RMuint8 retValue=1;
	RMuint32 regValue=0;
	RMuint32 regAdd=0x31;
	err = read_i2c(pInstance, delay, dev, regAdd, &regValue); 
	if (RMFAILED(err)) {
		fprintf(stderr, "Failed to read reg 0x%lx\n",regAdd);
		return -1;
	}
	
	if (!(regValue & 0x10)) {
		retValue=0;//Not standard signal . 
	}
	return retValue;
}

RMuint8 tw9919eid_isNTSC(struct RUA *pInstance, RMuint8 dev, RMuint8 delay)
{
	RMuint8 retValue=1;
	RMuint32 regValue=0;
	if (RMFAILED(read_i2c(pInstance, delay, dev, 0x01, &regValue))) {
		fprintf(stderr, "tw9919eid_isVideoIn() failed to read reg 0x01\n");
		return -1; //Error .
	}
	if ((regValue & 0x01)) {  // NTSC 525/59.94	
		retValue=0;//PAL 625/50
	}
	return retValue;
}

RMstatus tw9919eid_setRegColorSystem(
								  struct RUA *pInstance, 								  
								  RMuint8 dev, 
								  RMuint8 delay ,								  
								  RMuint8 isNTSC)
{
	RMstatus err=RM_OK;
	usleep(20);
	
	if (isNTSC) {
		err=init_i2c(pInstance,delay,dev,TW9919E_CCIR_NTSC_DataSet,sizeof(TW9919E_CCIR_NTSC_DataSet)/2/sizeof(RMuint8));					
		if (err!=RM_OK) {
			printf("init_capture_TW9919 Error <1>\n");
		}
	}else{
		err=init_i2c(pInstance,delay,dev,TW9919E_CCIR_PAL_DataSet,sizeof(TW9919E_CCIR_PAL_DataSet)/2/sizeof(RMuint8));
		if (err!=RM_OK) {
			printf("init_capture_TW9919 Error <2>\n");
		}
	}
	
	if (isNTSC) {		
		RMuint8 TW9919E_NTSC[][2] = {{0x09, 0xf6},{0x0a, 0xf},{0x55, 0x10},};
		printf("NTSC detected ! \n");
		err=init_i2c(pInstance,delay,dev,TW9919E_NTSC,sizeof(TW9919E_NTSC)/2/sizeof(RMuint8));
		if (err!=RM_OK) {
			printf("init_capture_TW9919() ERROR 5 !\n");
			
		}
	}else{
		RMuint8 TW9919E_PAL[][2]  = {{0x09, 0xf0},{0x0a, 0xf},{0x0c, 0xcc},{0x55, 0x00},};
		printf("PAL detected ! \n");
		err=init_i2c(pInstance,delay,dev,TW9919E_PAL,sizeof(TW9919E_PAL)/2/sizeof(RMuint8));
		if (err!=RM_OK) {
			printf("init_capture_TW9919() ERROR 5 !\n");
		}
	}
	return err;
}

RMstatus tw9919eid_setRegOutputInterface(struct RUA *pInstance, 								  
										 RMuint8 dev, 
										 RMuint8 delay ,								  
									 RMuint8 isNTSC)
{
	RMstatus err=RM_OK;
	if (isNTSC) {
		err=write_i2c(pInstance,delay,dev,0x07,0x02);
		//err=write_i2c(pInstance,delay,dev,0x07,0x10);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0x07\n");
			return err;
		}
		
		err=write_i2c(pInstance,delay,dev,0x08,0x12);
		//err=write_i2c(pInstance,delay,dev,0x08,0x0c);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0x08\n");
			return err;
		}
		err=write_i2c(pInstance,delay,dev,0x09,0xf4);
		//err=write_i2c(pInstance,delay,dev,0x09,0xf6);
		//err=write_i2c(pInstance,delay,dev,0x09,0x18);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0xf6\n");
			return err;
		}
		//only cvbs or s-video
		err=write_i2c(pInstance,delay,dev,0x0b,0xd0);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0x0b\n");
			return err;
		}
	}else {
		err=write_i2c(pInstance,delay,dev,0x07,0x12);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0x07\n");
			return err;
		}
		
		err=write_i2c(pInstance,delay,dev,0x08,0x18);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0x08\n");
			return err;
		}
		err=write_i2c(pInstance,delay,dev,0x09,0x20);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0xf6\n");
			return err;
		}
		//only cvbs or s-video
		err=write_i2c(pInstance,delay,dev,0x0b,0xd0);
		if (RMFAILED(err)) {
			fprintf(stderr, "get_format_TW9919() Failed to write reg 0x0b\n");
			return err;
		}
	}
	
	return err;
}

static RMuint8 tw9919eid_getAudioFrequencyType(RMuint32 sampleRate)
{
	RMuint8 rt=audio_frequency_44khz;
	if (sampleRate<20000) 
		rt=audio_frequency_8khz;
	else 
		if (sampleRate<38000) 
			rt=audio_frequency_32khz;
		else
			if (sampleRate<46000) 
				rt=audio_frequency_44khz;
			else
				rt=audio_frequency_48khz;
	return rt;			
}

RMstatus tw9919eid_setAudioClock(
									 struct RUA *pInstance, 								  
									 RMuint8 dev, 
									 RMuint8 delay ,								  
									 RMuint8 isNTSC,
									 RMuint32 afreqHz)
{
	RMstatus err=RM_OK;
	RMuint8 afreq=audio_frequency_44khz;
	afreq=tw9919eid_getAudioFrequencyType(afreqHz);
	if (isNTSC) {
		switch(afreq) {
		case audio_frequency_48khz:
			err=init_i2c(pInstance,delay,dev,TW9919E_AMCLK_48KHZ_NTSC,sizeof(TW9919E_AMCLK_48KHZ_NTSC)/2/sizeof(RMuint8));
			if (err!=RM_OK) {
				printf("tw9919eid_setAudioClock Error <1>\n");
			}
			break;
		default:
		case audio_frequency_44khz:
			err=init_i2c(pInstance,delay,dev,TW9919E_AMCLK_44KHZ_NTSC,sizeof(TW9919E_AMCLK_44KHZ_NTSC)/2/sizeof(RMuint8));
			if (err!=RM_OK) {
				printf("tw9919eid_setAudioClock Error <2>\n");
			}
			break;
		case audio_frequency_32khz:
			err=init_i2c(pInstance,delay,dev,TW9919E_AMCLK_32KHZ_NTSC,sizeof(TW9919E_AMCLK_32KHZ_NTSC)/2/sizeof(RMuint8));
			if (err!=RM_OK) {
				printf("tw9919eid_setAudioClock Error <3>\n");
			}
			break;
		case audio_frequency_8khz:
			err=init_i2c(pInstance,delay,dev,TW9919E_AMCLK_8KHZ_NTSC,sizeof(TW9919E_AMCLK_8KHZ_NTSC)/2/sizeof(RMuint8));
			if (err!=RM_OK) {
				printf("tw9919eid_setAudioClock Error <4>\n");
			}
			break;	
		}
		
	}
	else{
		switch(afreq) {
		case audio_frequency_48khz:
			err=init_i2c(pInstance,delay,dev,TW9919E_AMCLK_48KHZ_PAL,sizeof(TW9919E_AMCLK_48KHZ_PAL)/2/sizeof(RMuint8));
			if (err!=RM_OK) {
				printf("tw9919eid_setAudioClock Error <5>\n");
			}
			break;
		default:
		case audio_frequency_44khz:
			err=init_i2c(pInstance,delay,dev,TW9919E_AMCLK_44KHZ_PAL,sizeof(TW9919E_AMCLK_44KHZ_PAL)/2/sizeof(RMuint8));
			if (err!=RM_OK) {
				printf("tw9919eid_setAudioClock Error <6>\n");
			}
			break;
		case audio_frequency_32khz: