reg252.h

上课老师给的8086仿真器

/* 
 * Copyright (c) KEIL ELEKTRONIK GmbH and Franklin Software, Inc., 1991-1993
 * Register Declarations for 80252 Processor
 */


/*  BYTE Register  */
sfr P0     = 0x80;
sfr P1     = 0x90;
sfr P2     = 0xA0;
sfr P3     = 0xB0;
sfr PSW    = 0xD0;
sfr ACC    = 0xE0;
sfr B      = 0xF0;
sfr SP     = 0x81;
sfr DPL    = 0x82;
sfr DPH    = 0x83;
sfr PCON   = 0x87;
sfr TCON   = 0x88;
sfr TMOD   = 0x89;
sfr TL0    = 0x8A;
sfr TL1    = 0x8B;
sfr TH0    = 0x8C;
sfr TH1    = 0x8D;
sfr IE     = 0xA8;
sfr IP     = 0xB8;
sfr SCON   = 0x98;
sfr SBUF   = 0x99;
/*  80252 "Special Function Register"  */
sfr SADDR  = 0xA9;
sfr SADEN  = 0xB9;
sfr T2CON  = 0xC8;
sfr T2MOD  = 0xC9;
sfr RCAP2L = 0xCA;
sfr RCAP2H = 0xCB;
sfr TL2    = 0xCC;
sfr TH2    = 0xCD;
sfr CCON   = 0xD8;
sfr CMOD   = 0xD9;
sfr CCAPM0 = 0xDA;
sfr CCAPM1 = 0xDB;
sfr CCAPM2 = 0xDC;
sfr CCAPM3 = 0xDD;
sfr CCAPM4 = 0xDE;
sfr CL     = 0xE9;
sfr CCAP0L = 0xEA;
sfr CCAP1L = 0xEB;
sfr CCAP2L = 0xEC;
sfr CCAP3L = 0xED;
sfr CCAP4L = 0xEE;
sfr CH     = 0xF9;
sfr CCAP0H = 0xFA;
sfr CCAP1H = 0xFB;
sfr CCAP2H = 0xFC;
sfr CCAP3H = 0xFD;
sfr CCAP4H = 0xFE;

/*  BIT Register  */
/*  PSW  */
sbit CY     = 0xD7;
sbit AC     = 0xD6;
sbit F0     = 0xD5;
sbit RS1    = 0xD4;
sbit RS0    = 0xD3;
sbit OV     = 0xD2;
sbit P      = 0xD0;

/*  TCON  */
sbit TF1    = 0x8F;
sbit TR1    = 0x8E;
sbit TF0    = 0x8D;
sbit TR0    = 0x8C;
sbit IE1    = 0x8B;
sbit IT1    = 0x8A;
sbit IE0    = 0x89;
sbit IT0    = 0x88;

/*  IE  */
sbit EA     = 0xAF;
sbit ES     = 0xAC;
sbit ET1    = 0xAB;
sbit EX1    = 0xAA;
sbit ET0    = 0xA9;
sbit EX0    = 0xA8;

/*  IP  */
sbit PC     = 0xBE;
sbit PT2    = 0xBD;
sbit PS     = 0xBC;
sbit PT1    = 0xBB;
sbit PX1    = 0xBA;
sbit PT0    = 0xB9;
sbit PX0    = 0xB8;

/*  P1  */
sbit C4EX   = 0x97;
sbit C3EX   = 0x96;
sbit C2EX   = 0x95;
sbit C1EX   = 0x94;
sbit C0EX   = 0x93;
sbit C      = 0x92;
sbit T2EX   = 0x91;
sbit T2     = 0x90;

/*  P3  */
sbit RD     = 0xB7;
sbit WR     = 0xB6;
sbit T1     = 0xB5;
sbit T0     = 0xB4;
sbit INT1   = 0xB3;
sbit INT0   = 0xB2;
sbit TXD    = 0xB1;
sbit RXD    = 0xB0;

/*  SCON  */
sbit SM0    = 0x9F;
sbit SM1    = 0x9E;
sbit SM2    = 0x9D;
sbit REN    = 0x9C;
sbit TB8    = 0x9B;
sbit RB8    = 0x9A;
sbit TI     = 0x99;
sbit RI     = 0x98;

/*  T2CON  */
sbit TF2    = 0xCF;
sbit T2IP   = 0xCE;
sbit T2IE   = 0xCD;
sbit T2RSEN = 0xCC;
sbit BGEN   = 0xCB;
sbit TR2    = 0xCA;
sbit C_T2   = 0xC9;
sbit CP_RL2 = 0xC8;

/*  CCON  */
sbit CF     = 0xDF;
sbit CR     = 0xDE;
sbit CCF4   = 0xDC;
sbit CCF3   = 0xDB;
sbit CCF2   = 0xDA;
sbit CCF1   = 0xD9;
sbit CCF0   = 0xD8;