📄 song.fit.eqn
字号:
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--B1_speaker is song:inst|speaker at LC_X8_Y4_N8
--operation mode is normal
B1_speaker_lut_out = !B1_speaker;
B1_speaker = DFFEAS(B1_speaker_lut_out, A1L13, VCC, , , , , , );
--B1_divider[0] is song:inst|divider[0] at LC_X7_Y4_N3
--operation mode is arithmetic
B1_divider[0]_lut_out = !B1_divider[0];
B1_divider[0] = DFFEAS(B1_divider[0]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[0], , , A1L13);
--B1L73 is song:inst|divider[0]~197 at LC_X7_Y4_N3
--operation mode is arithmetic
B1L73_cout_0 = B1_divider[0];
B1L73 = CARRY(B1L73_cout_0);
--B1L74 is song:inst|divider[0]~197COUT1_264 at LC_X7_Y4_N3
--operation mode is arithmetic
B1L74_cout_1 = B1_divider[0];
B1L74 = CARRY(B1L74_cout_1);
--B1_divider[1] is song:inst|divider[1] at LC_X7_Y4_N4
--operation mode is arithmetic
B1_divider[1]_lut_out = B1_divider[1] $ B1L73;
B1_divider[1] = DFFEAS(B1_divider[1]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[1], , , A1L13);
--B1L76 is song:inst|divider[1]~201 at LC_X7_Y4_N4
--operation mode is arithmetic
B1L76 = CARRY(!B1L74 # !B1_divider[1]);
--B1_divider[2] is song:inst|divider[2] at LC_X7_Y4_N5
--operation mode is arithmetic
B1_divider[2]_carry_eqn = B1L76;
B1_divider[2]_lut_out = B1_divider[2] $ (!B1_divider[2]_carry_eqn);
B1_divider[2] = DFFEAS(B1_divider[2]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[2], , , A1L13);
--B1L78 is song:inst|divider[2]~205 at LC_X7_Y4_N5
--operation mode is arithmetic
B1L78_cout_0 = B1_divider[2] & (!B1L76);
B1L78 = CARRY(B1L78_cout_0);
--B1L79 is song:inst|divider[2]~205COUT1_266 at LC_X7_Y4_N5
--operation mode is arithmetic
B1L79_cout_1 = B1_divider[2] & (!B1L76);
B1L79 = CARRY(B1L79_cout_1);
--B1_divider[3] is song:inst|divider[3] at LC_X7_Y4_N6
--operation mode is arithmetic
B1_divider[3]_carry_eqn = (!B1L76 & B1L78) # (B1L76 & B1L79);
B1_divider[3]_lut_out = B1_divider[3] $ (B1_divider[3]_carry_eqn);
B1_divider[3] = DFFEAS(B1_divider[3]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[3], , , A1L13);
--B1L81 is song:inst|divider[3]~209 at LC_X7_Y4_N6
--operation mode is arithmetic
B1L81_cout_0 = !B1L78 # !B1_divider[3];
B1L81 = CARRY(B1L81_cout_0);
--B1L82 is song:inst|divider[3]~209COUT1_268 at LC_X7_Y4_N6
--operation mode is arithmetic
B1L82_cout_1 = !B1L79 # !B1_divider[3];
B1L82 = CARRY(B1L82_cout_1);
--A1L9 is rtl~1098 at LC_X7_Y4_N2
--operation mode is normal
A1L9 = B1_divider[3] & B1_divider[1] & B1_divider[2] & B1_divider[0];
--B1_divider[4] is song:inst|divider[4] at LC_X7_Y4_N7
--operation mode is arithmetic
B1_divider[4]_carry_eqn = (!B1L76 & B1L81) # (B1L76 & B1L82);
B1_divider[4]_lut_out = B1_divider[4] $ !B1_divider[4]_carry_eqn;
B1_divider[4] = DFFEAS(B1_divider[4]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[4], , , A1L13);
--B1L84 is song:inst|divider[4]~213 at LC_X7_Y4_N7
--operation mode is arithmetic
B1L84_cout_0 = B1_divider[4] & !B1L81;
B1L84 = CARRY(B1L84_cout_0);
--B1L85 is song:inst|divider[4]~213COUT1_270 at LC_X7_Y4_N7
--operation mode is arithmetic
B1L85_cout_1 = B1_divider[4] & !B1L82;
B1L85 = CARRY(B1L85_cout_1);
--B1_divider[5] is song:inst|divider[5] at LC_X7_Y4_N8
--operation mode is arithmetic
B1_divider[5]_carry_eqn = (!B1L76 & B1L84) # (B1L76 & B1L85);
B1_divider[5]_lut_out = B1_divider[5] $ (B1_divider[5]_carry_eqn);
B1_divider[5] = DFFEAS(B1_divider[5]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[5], , , A1L13);
--B1L87 is song:inst|divider[5]~217 at LC_X7_Y4_N8
--operation mode is arithmetic
B1L87_cout_0 = !B1L84 # !B1_divider[5];
B1L87 = CARRY(B1L87_cout_0);
--B1L88 is song:inst|divider[5]~217COUT1_272 at LC_X7_Y4_N8
--operation mode is arithmetic
B1L88_cout_1 = !B1L85 # !B1_divider[5];
B1L88 = CARRY(B1L88_cout_1);
--B1_divider[6] is song:inst|divider[6] at LC_X7_Y4_N9
--operation mode is arithmetic
B1_divider[6]_carry_eqn = (!B1L76 & B1L87) # (B1L76 & B1L88);
B1_divider[6]_lut_out = B1_divider[6] $ !B1_divider[6]_carry_eqn;
B1_divider[6] = DFFEAS(B1_divider[6]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[6], , , A1L13);
--B1L90 is song:inst|divider[6]~221 at LC_X7_Y4_N9
--operation mode is arithmetic
B1L90 = CARRY(B1_divider[6] & !B1L88);
--B1_divider[7] is song:inst|divider[7] at LC_X8_Y4_N0
--operation mode is arithmetic
B1_divider[7]_carry_eqn = B1L90;
B1_divider[7]_lut_out = B1_divider[7] $ B1_divider[7]_carry_eqn;
B1_divider[7] = DFFEAS(B1_divider[7]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[7], , , A1L13);
--B1L92 is song:inst|divider[7]~225 at LC_X8_Y4_N0
--operation mode is arithmetic
B1L92_cout_0 = !B1L90 # !B1_divider[7];
B1L92 = CARRY(B1L92_cout_0);
--B1L93 is song:inst|divider[7]~225COUT1_274 at LC_X8_Y4_N0
--operation mode is arithmetic
B1L93_cout_1 = !B1L90 # !B1_divider[7];
B1L93 = CARRY(B1L93_cout_1);
--A1L10 is rtl~1099 at LC_X7_Y4_N0
--operation mode is normal
A1L10 = B1_divider[7] & B1_divider[6] & B1_divider[4] & B1_divider[5];
--B1_divider[8] is song:inst|divider[8] at LC_X8_Y4_N1
--operation mode is arithmetic
B1_divider[8]_carry_eqn = (!B1L90 & B1L92) # (B1L90 & B1L93);
B1_divider[8]_lut_out = B1_divider[8] $ !B1_divider[8]_carry_eqn;
B1_divider[8] = DFFEAS(B1_divider[8]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[8], , , A1L13);
--B1L95 is song:inst|divider[8]~229 at LC_X8_Y4_N1
--operation mode is arithmetic
B1L95_cout_0 = B1_divider[8] & !B1L92;
B1L95 = CARRY(B1L95_cout_0);
--B1L96 is song:inst|divider[8]~229COUT1_276 at LC_X8_Y4_N1
--operation mode is arithmetic
B1L96_cout_1 = B1_divider[8] & !B1L93;
B1L96 = CARRY(B1L96_cout_1);
--B1_divider[9] is song:inst|divider[9] at LC_X8_Y4_N2
--operation mode is arithmetic
B1_divider[9]_carry_eqn = (!B1L90 & B1L95) # (B1L90 & B1L96);
B1_divider[9]_lut_out = B1_divider[9] $ B1_divider[9]_carry_eqn;
B1_divider[9] = DFFEAS(B1_divider[9]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[9], , , A1L13);
--B1L98 is song:inst|divider[9]~233 at LC_X8_Y4_N2
--operation mode is arithmetic
B1L98_cout_0 = !B1L95 # !B1_divider[9];
B1L98 = CARRY(B1L98_cout_0);
--B1L99 is song:inst|divider[9]~233COUT1_278 at LC_X8_Y4_N2
--operation mode is arithmetic
B1L99_cout_1 = !B1L96 # !B1_divider[9];
B1L99 = CARRY(B1L99_cout_1);
--B1_divider[10] is song:inst|divider[10] at LC_X8_Y4_N3
--operation mode is arithmetic
B1_divider[10]_carry_eqn = (!B1L90 & B1L98) # (B1L90 & B1L99);
B1_divider[10]_lut_out = B1_divider[10] $ (!B1_divider[10]_carry_eqn);
B1_divider[10] = DFFEAS(B1_divider[10]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[10], , , A1L13);
--B1L101 is song:inst|divider[10]~237 at LC_X8_Y4_N3
--operation mode is arithmetic
B1L101_cout_0 = B1_divider[10] & (!B1L98);
B1L101 = CARRY(B1L101_cout_0);
--B1L102 is song:inst|divider[10]~237COUT1_280 at LC_X8_Y4_N3
--operation mode is arithmetic
B1L102_cout_1 = B1_divider[10] & (!B1L99);
B1L102 = CARRY(B1L102_cout_1);
--B1_divider[11] is song:inst|divider[11] at LC_X8_Y4_N4
--operation mode is arithmetic
B1_divider[11]_carry_eqn = (!B1L90 & B1L101) # (B1L90 & B1L102);
B1_divider[11]_lut_out = B1_divider[11] $ (B1_divider[11]_carry_eqn);
B1_divider[11] = DFFEAS(B1_divider[11]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[11], , , A1L13);
--B1L104 is song:inst|divider[11]~241 at LC_X8_Y4_N4
--operation mode is arithmetic
B1L104 = CARRY(!B1L102 # !B1_divider[11]);
--A1L11 is rtl~1100 at LC_X8_Y4_N9
--operation mode is normal
A1L11 = B1_divider[11] & B1_divider[9] & B1_divider[8] & B1_divider[10];
--B1_divider[12] is song:inst|divider[12] at LC_X8_Y4_N5
--operation mode is arithmetic
B1_divider[12]_carry_eqn = B1L104;
B1_divider[12]_lut_out = B1_divider[12] $ (!B1_divider[12]_carry_eqn);
B1_divider[12] = DFFEAS(B1_divider[12]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[12], , , A1L13);
--B1L106 is song:inst|divider[12]~245 at LC_X8_Y4_N5
--operation mode is arithmetic
B1L106_cout_0 = B1_divider[12] & (!B1L104);
B1L106 = CARRY(B1L106_cout_0);
--B1L107 is song:inst|divider[12]~245COUT1_282 at LC_X8_Y4_N5
--operation mode is arithmetic
B1L107_cout_1 = B1_divider[12] & (!B1L104);
B1L107 = CARRY(B1L107_cout_1);
--B1_divider[13] is song:inst|divider[13] at LC_X8_Y4_N6
--operation mode is normal
B1_divider[13]_carry_eqn = (!B1L104 & B1L106) # (B1L104 & B1L107);
B1_divider[13]_lut_out = B1_divider[13]_carry_eqn $ B1_divider[13];
B1_divider[13] = DFFEAS(B1_divider[13]_lut_out, GLOBAL(D1_clock_int), VCC, , , B1_origin[13], , , A1L13);
--A1L12 is rtl~1101 at LC_X8_Y4_N7
--operation mode is normal
A1L12 = B1_divider[12] & B1_divider[13];
--A1L13 is rtl~1102 at LC_X7_Y4_N1
--operation mode is normal
A1L13 = A1L12 & A1L11 & A1L10 & A1L9;
--D1_clock_int is clockdiv6:inst2|clock_int at LC_X12_Y3_N6
--operation mode is normal
D1_clock_int_lut_out = D1_clock_int $ (D1_\count:counter[0] & D1_\count:counter[1]);
D1_clock_int = DFFEAS(D1_clock_int_lut_out, GLOBAL(clk), VCC, , , , , , );
--B1_origin[0] is song:inst|origin[0] at LC_X7_Y5_N3
--operation mode is normal
B1_origin[0]_lut_out = B1_origin[0] & !B1L137 # !B1L3;
B1_origin[0] = DFFEAS(B1_origin[0]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[1] is song:inst|origin[1] at LC_X8_Y5_N6
--operation mode is normal
B1_origin[1]_lut_out = A1L5 # B1_origin[1] & !B1L137 # !B1L4;
B1_origin[1] = DFFEAS(B1_origin[1]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[2] is song:inst|origin[2] at LC_X8_Y5_N9
--operation mode is normal
B1_origin[2]_lut_out = !B1L137 & B1_origin[2] # !B1L6;
B1_origin[2] = DFFEAS(B1_origin[2]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[3] is song:inst|origin[3] at LC_X8_Y6_N4
--operation mode is normal
B1_origin[3]_lut_out = A1L2 # B1L35 # !B1L37 # !B1L38;
B1_origin[3] = DFFEAS(B1_origin[3]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[4] is song:inst|origin[4] at LC_X7_Y5_N5
--operation mode is normal
B1_origin[4]_lut_out = A1L5 # B1_origin[4] & !B1L137 # !B1L3;
B1_origin[4] = DFFEAS(B1_origin[4]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[5] is song:inst|origin[5] at LC_X7_Y5_N6
--operation mode is normal
B1_origin[5]_lut_out = A1L4 # B1_origin[5] & !B1L137 # !B1L7;
B1_origin[5] = DFFEAS(B1_origin[5]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[6] is song:inst|origin[6] at LC_X9_Y5_N4
--operation mode is normal
B1_origin[6]_lut_out = A1L6 # B1_origin[6] & !B1L137 # !B1L8;
B1_origin[6] = DFFEAS(B1_origin[6]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[7] is song:inst|origin[7] at LC_X9_Y5_N3
--operation mode is normal
B1_origin[7]_lut_out = B1_origin[7] & !B1L137 # !B1L36 # !B1L9;
B1_origin[7] = DFFEAS(B1_origin[7]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[8] is song:inst|origin[8] at LC_X8_Y5_N2
--operation mode is normal
B1_origin[8]_lut_out = !B1L137 & B1_origin[8] # !B1L5 # !B1L9;
B1_origin[8] = DFFEAS(B1_origin[8]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[9] is song:inst|origin[9] at LC_X7_Y5_N0
--operation mode is normal
B1_origin[9]_lut_out = A1L5 # B1_origin[9] & !B1L137 # !B1L7;
B1_origin[9] = DFFEAS(B1_origin[9]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[10] is song:inst|origin[10] at LC_X9_Y5_N8
--operation mode is normal
B1_origin[10]_lut_out = B1L10 # B1_origin[10] & !B1L137 # !B1L8;
B1_origin[10] = DFFEAS(B1_origin[10]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[11] is song:inst|origin[11] at LC_X8_Y5_N5
--operation mode is normal
B1_origin[11]_lut_out = A1L6 # A1L4 # B1L11 # !B1L2;
B1_origin[11] = DFFEAS(B1_origin[11]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[12] is song:inst|origin[12] at LC_X9_Y5_N9
--operation mode is normal
B1_origin[12]_lut_out = A1L4 # B1_origin[12] & !B1L137 # !B1L38;
B1_origin[12] = DFFEAS(B1_origin[12]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--B1_origin[13] is song:inst|origin[13] at LC_X8_Y5_N0
--operation mode is normal
B1_origin[13]_lut_out = !B1L137 & B1_origin[13] # !B1L6 # !B1L37;
B1_origin[13] = DFFEAS(B1_origin[13]_lut_out, GLOBAL(C1_clock_int), VCC, , , , , , );
--D1_\count:counter[1] is clockdiv6:inst2|\count:counter[1] at LC_X12_Y3_N8
--operation mode is normal
D1_\count:counter[1]_lut_out = D1_\count:counter[0] $ (D1_\count:counter[1]);
D1_\count:counter[1] = DFFEAS(D1_\count:counter[1]_lut_out, GLOBAL(clk), VCC, , , , , , );
--D1_\count:counter[0] is clockdiv6:inst2|\count:counter[0] at LC_X12_Y3_N2
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -