song.map.eqn

speaker code,for thinx cpld

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--B1_speaker is song:inst|speaker
--operation mode is normal

B1_speaker_lut_out = !B1_speaker;
B1_speaker = DFFEAS(B1_speaker_lut_out, A1L13, VCC, , , , , , );


--B1_divider[0] is song:inst|divider[0]
--operation mode is arithmetic

B1_divider[0]_lut_out = !B1_divider[0];
B1_divider[0] = DFFEAS(B1_divider[0]_lut_out, D1_clock_int, VCC, , , B1_origin[0], , , A1L13);

--B1L65 is song:inst|divider[0]~197
--operation mode is arithmetic

B1L65 = CARRY(B1_divider[0]);


--B1_divider[1] is song:inst|divider[1]
--operation mode is arithmetic

B1_divider[1]_carry_eqn = B1L65;
B1_divider[1]_lut_out = B1_divider[1] $ (B1_divider[1]_carry_eqn);
B1_divider[1] = DFFEAS(B1_divider[1]_lut_out, D1_clock_int, VCC, , , B1_origin[1], , , A1L13);

--B1L67 is song:inst|divider[1]~201
--operation mode is arithmetic

B1L67 = CARRY(!B1L65 # !B1_divider[1]);


--B1_divider[2] is song:inst|divider[2]
--operation mode is arithmetic

B1_divider[2]_carry_eqn = B1L67;
B1_divider[2]_lut_out = B1_divider[2] $ (!B1_divider[2]_carry_eqn);
B1_divider[2] = DFFEAS(B1_divider[2]_lut_out, D1_clock_int, VCC, , , B1_origin[2], , , A1L13);

--B1L69 is song:inst|divider[2]~205
--operation mode is arithmetic

B1L69 = CARRY(B1_divider[2] & (!B1L67));


--B1_divider[3] is song:inst|divider[3]
--operation mode is arithmetic

B1_divider[3]_carry_eqn = B1L69;
B1_divider[3]_lut_out = B1_divider[3] $ (B1_divider[3]_carry_eqn);
B1_divider[3] = DFFEAS(B1_divider[3]_lut_out, D1_clock_int, VCC, , , B1_origin[3], , , A1L13);

--B1L71 is song:inst|divider[3]~209
--operation mode is arithmetic

B1L71 = CARRY(!B1L69 # !B1_divider[3]);


--A1L9 is rtl~1098
--operation mode is normal

A1L9 = B1_divider[0] & B1_divider[1] & B1_divider[2] & B1_divider[3];


--B1_divider[4] is song:inst|divider[4]
--operation mode is arithmetic

B1_divider[4]_carry_eqn = B1L71;
B1_divider[4]_lut_out = B1_divider[4] $ (!B1_divider[4]_carry_eqn);
B1_divider[4] = DFFEAS(B1_divider[4]_lut_out, D1_clock_int, VCC, , , B1_origin[4], , , A1L13);

--B1L73 is song:inst|divider[4]~213
--operation mode is arithmetic

B1L73 = CARRY(B1_divider[4] & (!B1L71));


--B1_divider[5] is song:inst|divider[5]
--operation mode is arithmetic

B1_divider[5]_carry_eqn = B1L73;
B1_divider[5]_lut_out = B1_divider[5] $ (B1_divider[5]_carry_eqn);
B1_divider[5] = DFFEAS(B1_divider[5]_lut_out, D1_clock_int, VCC, , , B1_origin[5], , , A1L13);

--B1L75 is song:inst|divider[5]~217
--operation mode is arithmetic

B1L75 = CARRY(!B1L73 # !B1_divider[5]);


--B1_divider[6] is song:inst|divider[6]
--operation mode is arithmetic

B1_divider[6]_carry_eqn = B1L75;
B1_divider[6]_lut_out = B1_divider[6] $ (!B1_divider[6]_carry_eqn);
B1_divider[6] = DFFEAS(B1_divider[6]_lut_out, D1_clock_int, VCC, , , B1_origin[6], , , A1L13);

--B1L77 is song:inst|divider[6]~221
--operation mode is arithmetic

B1L77 = CARRY(B1_divider[6] & (!B1L75));


--B1_divider[7] is song:inst|divider[7]
--operation mode is arithmetic

B1_divider[7]_carry_eqn = B1L77;
B1_divider[7]_lut_out = B1_divider[7] $ (B1_divider[7]_carry_eqn);
B1_divider[7] = DFFEAS(B1_divider[7]_lut_out, D1_clock_int, VCC, , , B1_origin[7], , , A1L13);

--B1L79 is song:inst|divider[7]~225
--operation mode is arithmetic

B1L79 = CARRY(!B1L77 # !B1_divider[7]);


--A1L10 is rtl~1099
--operation mode is normal

A1L10 = B1_divider[4] & B1_divider[5] & B1_divider[6] & B1_divider[7];


--B1_divider[8] is song:inst|divider[8]
--operation mode is arithmetic

B1_divider[8]_carry_eqn = B1L79;
B1_divider[8]_lut_out = B1_divider[8] $ (!B1_divider[8]_carry_eqn);
B1_divider[8] = DFFEAS(B1_divider[8]_lut_out, D1_clock_int, VCC, , , B1_origin[8], , , A1L13);

--B1L81 is song:inst|divider[8]~229
--operation mode is arithmetic

B1L81 = CARRY(B1_divider[8] & (!B1L79));


--B1_divider[9] is song:inst|divider[9]
--operation mode is arithmetic

B1_divider[9]_carry_eqn = B1L81;
B1_divider[9]_lut_out = B1_divider[9] $ (B1_divider[9]_carry_eqn);
B1_divider[9] = DFFEAS(B1_divider[9]_lut_out, D1_clock_int, VCC, , , B1_origin[9], , , A1L13);

--B1L83 is song:inst|divider[9]~233
--operation mode is arithmetic

B1L83 = CARRY(!B1L81 # !B1_divider[9]);


--B1_divider[10] is song:inst|divider[10]
--operation mode is arithmetic

B1_divider[10]_carry_eqn = B1L83;
B1_divider[10]_lut_out = B1_divider[10] $ (!B1_divider[10]_carry_eqn);
B1_divider[10] = DFFEAS(B1_divider[10]_lut_out, D1_clock_int, VCC, , , B1_origin[10], , , A1L13);

--B1L85 is song:inst|divider[10]~237
--operation mode is arithmetic

B1L85 = CARRY(B1_divider[10] & (!B1L83));


--B1_divider[11] is song:inst|divider[11]
--operation mode is arithmetic

B1_divider[11]_carry_eqn = B1L85;
B1_divider[11]_lut_out = B1_divider[11] $ (B1_divider[11]_carry_eqn);
B1_divider[11] = DFFEAS(B1_divider[11]_lut_out, D1_clock_int, VCC, , , B1_origin[11], , , A1L13);

--B1L87 is song:inst|divider[11]~241
--operation mode is arithmetic

B1L87 = CARRY(!B1L85 # !B1_divider[11]);


--A1L11 is rtl~1100
--operation mode is normal

A1L11 = B1_divider[8] & B1_divider[9] & B1_divider[10] & B1_divider[11];


--B1_divider[12] is song:inst|divider[12]
--operation mode is arithmetic

B1_divider[12]_carry_eqn = B1L87;
B1_divider[12]_lut_out = B1_divider[12] $ (!B1_divider[12]_carry_eqn);
B1_divider[12] = DFFEAS(B1_divider[12]_lut_out, D1_clock_int, VCC, , , B1_origin[12], , , A1L13);

--B1L89 is song:inst|divider[12]~245
--operation mode is arithmetic

B1L89 = CARRY(B1_divider[12] & (!B1L87));


--B1_divider[13] is song:inst|divider[13]
--operation mode is normal

B1_divider[13]_carry_eqn = B1L89;
B1_divider[13]_lut_out = B1_divider[13] $ (B1_divider[13]_carry_eqn);
B1_divider[13] = DFFEAS(B1_divider[13]_lut_out, D1_clock_int, VCC, , , B1_origin[13], , , A1L13);


--A1L12 is rtl~1101
--operation mode is normal

A1L12 = B1_divider[12] & B1_divider[13];


--A1L13 is rtl~1102
--operation mode is normal

A1L13 = A1L9 & A1L10 & A1L11 & A1L12;


--D1_clock_int is clockdiv6:inst2|clock_int
--operation mode is normal

D1_clock_int_lut_out = D1_clock_int $ (D1_\count:counter[1] & D1_\count:counter[0]);
D1_clock_int = DFFEAS(D1_clock_int_lut_out, clk, VCC, , , , , , );


--B1_origin[0] is song:inst|origin[0]
--operation mode is normal

B1_origin[0]_lut_out = B1_origin[0] & !B1L119 # !B1L3;
B1_origin[0] = DFFEAS(B1_origin[0]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[1] is song:inst|origin[1]
--operation mode is normal

B1_origin[1]_lut_out = A1L5 # B1_origin[1] & !B1L119 # !B1L4;
B1_origin[1] = DFFEAS(B1_origin[1]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[2] is song:inst|origin[2]
--operation mode is normal

B1_origin[2]_lut_out = B1_origin[2] & !B1L119 # !B1L6;
B1_origin[2] = DFFEAS(B1_origin[2]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[3] is song:inst|origin[3]
--operation mode is normal

B1_origin[3]_lut_out = A1L2 # B1L35 # !B1L37 # !B1L38;
B1_origin[3] = DFFEAS(B1_origin[3]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[4] is song:inst|origin[4]
--operation mode is normal

B1_origin[4]_lut_out = A1L5 # B1_origin[4] & !B1L119 # !B1L3;
B1_origin[4] = DFFEAS(B1_origin[4]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[5] is song:inst|origin[5]
--operation mode is normal

B1_origin[5]_lut_out = A1L4 # B1_origin[5] & !B1L119 # !B1L7;
B1_origin[5] = DFFEAS(B1_origin[5]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[6] is song:inst|origin[6]
--operation mode is normal

B1_origin[6]_lut_out = A1L6 # B1_origin[6] & !B1L119 # !B1L8;
B1_origin[6] = DFFEAS(B1_origin[6]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[7] is song:inst|origin[7]
--operation mode is normal

B1_origin[7]_lut_out = B1_origin[7] & !B1L119 # !B1L36 # !B1L9;
B1_origin[7] = DFFEAS(B1_origin[7]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[8] is song:inst|origin[8]
--operation mode is normal

B1_origin[8]_lut_out = B1_origin[8] & !B1L119 # !B1L5 # !B1L9;
B1_origin[8] = DFFEAS(B1_origin[8]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[9] is song:inst|origin[9]
--operation mode is normal

B1_origin[9]_lut_out = A1L5 # B1_origin[9] & !B1L119 # !B1L7;
B1_origin[9] = DFFEAS(B1_origin[9]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[10] is song:inst|origin[10]
--operation mode is normal

B1_origin[10]_lut_out = B1L10 # B1_origin[10] & !B1L119 # !B1L8;
B1_origin[10] = DFFEAS(B1_origin[10]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[11] is song:inst|origin[11]
--operation mode is normal

B1_origin[11]_lut_out = A1L4 # A1L6 # B1L11 # !B1L2;
B1_origin[11] = DFFEAS(B1_origin[11]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[12] is song:inst|origin[12]
--operation mode is normal

B1_origin[12]_lut_out = A1L4 # B1_origin[12] & !B1L119 # !B1L38;
B1_origin[12] = DFFEAS(B1_origin[12]_lut_out, C1_clock_int, VCC, , , , , , );


--B1_origin[13] is song:inst|origin[13]
--operation mode is normal

B1_origin[13]_lut_out = B1_origin[13] & !B1L119 # !B1L37 # !B1L6;
B1_origin[13] = DFFEAS(B1_origin[13]_lut_out, C1_clock_int, VCC, , , , , , );


--D1_\count:counter[1] is clockdiv6:inst2|\count:counter[1]
--operation mode is normal

D1_\count:counter[1]_lut_out = D1_\count:counter[1] $ D1_\count:counter[0];
D1_\count:counter[1] = DFFEAS(D1_\count:counter[1]_lut_out, clk, VCC, , , , , , );


--D1_\count:counter[0] is clockdiv6:inst2|\count:counter[0]
--operation mode is normal

D1_\count:counter[0]_lut_out = !D1_\count:counter[0];
D1_\count:counter[0] = DFFEAS(D1_\count:counter[0]_lut_out, clk, VCC, , , , , , );


--B1_high[0] is song:inst|high[0]
--operation mode is normal

B1_high[0]_lut_out = B1L12 & (!B1L47 & !B1L49);
B1_high[0] = DFFEAS(B1_high[0]_lut_out, C1_clock_int, VCC, , B1L93, , , , );


--B1_med[1] is song:inst|med[1]
--operation mode is normal

B1_med[1]_lut_out = B1L43 & (!B1L49) # !B1L43 & B1L13;
B1_med[1] = DFFEAS(B1_med[1]_lut_out, C1_clock_int, VCC, , B1L93, B1L15, , , !B1L45);


--B1_med[0] is song:inst|med[0]
--operation mode is normal

B1_med[0]_lut_out = B1L47 & (B1L17) # !B1L47 & B1L16;
B1_med[0] = DFFEAS(B1_med[0]_lut_out, C1_clock_int, VCC, , B1L93, B1L19, , , B1L45);


--B1_med[2] is song:inst|med[2]
--operation mode is normal

B1_med[2]_lut_out = B1L43 & B1L20 & !B1L45 & !A1L8;
B1_med[2] = DFFEAS(B1_med[2]_lut_out, C1_clock_int, VCC, , B1L93, , , , );


--A1L14 is rtl~1103
--operation mode is normal

A1L14 = !B1_med[1] & !B1_med[0] & !B1_med[2];


--B1_low[2] is song:inst|low[2]
--operation mode is normal

B1_low[2]_lut_out = B1L43 & B1L49 # !B1L43 & (B1L21);
B1_low[2] = DFFEAS(B1_low[2]_lut_out, C1_clock_int, VCC, , B1L93, B1L23, , , !B1L45);


--B1_low[0] is song:inst|low[0]
--operation mode is normal

B1_low[0]_lut_out = B1L43 & B1L49 # !B1L43 & (B1L24);
B1_low[0] = DFFEAS(B1_low[0]_lut_out, C1_clock_int, VCC, , B1L93, B1L28, , , !B1L45);


--B1_low[1] is song:inst|low[1]
--operation mode is normal

B1_low[1]_lut_out = B1L30 # B1L33 # B1L34 & B1L25;
B1_low[1] = DFFEAS(B1_low[1]_lut_out, C1_clock_int, VCC, , B1L93, , , , );


--A1L15 is rtl~1104
--operation mode is normal

A1L15 = !B1_low[2] & !B1_low[0] & !B1_low[1];


--A1L7 is rtl~11
--operation mode is normal

A1L7 = B1_high[0] & A1L14 & A1L15;


--B1L117 is song:inst|reduce_nor~248
--operation mode is normal

B1L117 = B1_med[1] & (!B1_med[2] # !B1_med[0]) # !B1_med[1] & B1_med[0];


--B1L118 is song:inst|reduce_nor~249
--operation mode is normal

B1L118 = B1_low[0] & (B1L117 # !B1_low[1] & !B1_low[2]) # !B1_low[0] & (B1_low[1] & (B1L117 # !B1_low[2]) # !B1_low[1] & B1_low[2]);


--B1L119 is song:inst|reduce_nor~250
--operation mode is normal

B1L119 = A1L7 # !B1L120 & !B1L118;


--A1L16 is rtl~1105
--operation mode is normal

A1L16 = !B1_low[2] & !B1_low[0] & !B1_high[0] & !B1_low[1];


--B1L2 is song:inst|Select~4017
--operation mode is normal

B1L2 = B1_med[2] # B1_med[1] & !B1_med[0] # !A1L16;


--A1L17 is rtl~1106
--operation mode is normal

A1L17 = !B1_med[1] & !B1_med[0] & !B1_high[0] & !B1_med[2];


--A1L2 is rtl~2
--operation mode is normal

A1L2 = B1_low[2] & A1L17 & B1_low[1] & !B1_low[0];


--A1L4 is rtl~6
--operation mode is normal

A1L4 = B1_low[0] & A1L17 & B1_low[1] & !B1_low[2];


--B1L3 is song:inst|Select~4018
--operation mode is normal

B1L3 = B1L2 & (!A1L2 & !A1L4);