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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--A1L34 is SEG~1105
--operation mode is normal
A1L34 = DB[2] & !DB[3] & (!DB[1] # !DB[0]) # !DB[2] & (DB[1] $ DB[3]);
--A1L35 is SEG~1106
--operation mode is normal
A1L35 = DB[2] & !DB[3] & (!DB[1] # !DB[0]) # !DB[2] & !DB[1] & (DB[3] # !DB[0]);
--A1L36 is SEG~1107
--operation mode is normal
A1L36 = !DB[0] & (DB[1] & (!DB[3]) # !DB[1] & !DB[2]);
--A1L37 is SEG~1108
--operation mode is normal
A1L37 = DB[1] & !DB[3] & (!DB[2] # !DB[0]) # !DB[1] & (DB[2] $ (DB[3] # !DB[0]));
--A1L38 is SEG~1109
--operation mode is normal
A1L38 = DB[2] & !DB[3] & (DB[0] $ !DB[1]) # !DB[2] & (!DB[3] # !DB[1]);
--A1L20 is SEG2~1074
--operation mode is normal
A1L20 = DB2[2] & !DB2[3] & (!DB2[1] # !DB2[0]) # !DB2[2] & (DB2[1] $ DB2[3]);
--A1L21 is SEG2~1075
--operation mode is normal
A1L21 = DB2[2] & !DB2[3] & (!DB2[1] # !DB2[0]) # !DB2[2] & !DB2[1] & (DB2[3] # !DB2[0]);
--A1L22 is SEG2~1076
--operation mode is normal
A1L22 = !DB2[0] & (DB2[1] & (!DB2[3]) # !DB2[1] & !DB2[2]);
--A1L23 is SEG2~1077
--operation mode is normal
A1L23 = DB2[1] & !DB2[3] & (!DB2[2] # !DB2[0]) # !DB2[1] & (DB2[2] $ (DB2[3] # !DB2[0]));
--A1L24 is SEG2~1078
--operation mode is normal
A1L24 = DB2[2] & !DB2[3] & (DB2[0] $ !DB2[1]) # !DB2[2] & (!DB2[3] # !DB2[1]);
--A1L39 is SEG~1110
--operation mode is normal
A1L39 = DB[1] & !DB[3] # !DB[1] & (DB[2] $ (DB[3] # !DB[0]));
--A1L40 is SEG~1111
--operation mode is normal
A1L40 = DB[2] & (!DB[3]) # !DB[2] & (DB[0] & !DB[3] # !DB[1]);
--A1L25 is SEG2~1079
--operation mode is normal
A1L25 = DB2[1] & !DB2[3] # !DB2[1] & (DB2[2] $ (DB2[3] # !DB2[0]));
--A1L26 is SEG2~1080
--operation mode is normal
A1L26 = DB2[2] & (!DB2[3]) # !DB2[2] & (DB2[0] & !DB2[3] # !DB2[1]);
--DB[0] is DB[0]
--operation mode is input
DB[0] = INPUT();
--DB[2] is DB[2]
--operation mode is input
DB[2] = INPUT();
--DB[1] is DB[1]
--operation mode is input
DB[1] = INPUT();
--DB[3] is DB[3]
--operation mode is input
DB[3] = INPUT();
--DB2[0] is DB2[0]
--operation mode is input
DB2[0] = INPUT();
--DB2[2] is DB2[2]
--operation mode is input
DB2[2] = INPUT();
--DB2[1] is DB2[1]
--operation mode is input
DB2[1] = INPUT();
--DB2[3] is DB2[3]
--operation mode is input
DB2[3] = INPUT();
--SEG[0] is SEG[0]
--operation mode is output
SEG[0] = OUTPUT(A1L34);
--SEG[1] is SEG[1]
--operation mode is output
SEG[1] = OUTPUT(A1L35);
--SEG[2] is SEG[2]
--operation mode is output
SEG[2] = OUTPUT(A1L36);
--SEG[3] is SEG[3]
--operation mode is output
SEG[3] = OUTPUT(A1L37);
--SEG[4] is SEG[4]
--operation mode is output
SEG[4] = OUTPUT(A1L40);
--SEG[5] is SEG[5]
--operation mode is output
SEG[5] = OUTPUT(A1L38);
--SEG[6] is SEG[6]
--operation mode is output
SEG[6] = OUTPUT(A1L39);
--SEG2[0] is SEG2[0]
--operation mode is output
SEG2[0] = OUTPUT(A1L20);
--SEG2[1] is SEG2[1]
--operation mode is output
SEG2[1] = OUTPUT(A1L21);
--SEG2[2] is SEG2[2]
--operation mode is output
SEG2[2] = OUTPUT(A1L22);
--SEG2[3] is SEG2[3]
--operation mode is output
SEG2[3] = OUTPUT(A1L23);
--SEG2[4] is SEG2[4]
--operation mode is output
SEG2[4] = OUTPUT(A1L26);
--SEG2[5] is SEG2[5]
--operation mode is output
SEG2[5] = OUTPUT(A1L24);
--SEG2[6] is SEG2[6]
--operation mode is output
SEG2[6] = OUTPUT(A1L25);
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