📄 mfrc50~1.c
字号:
#include <string.h>
#include <stdio.h>
#include <e:\avr\avr_soft\MfRc500.h>
#include <e:\avr\avr_soft\main.h>
#include <iom8v.h>
unsigned char MLastSelectedSnr[5];
#define TCLFSDSNDMAX 8 ///< max. frame size send
#define TCLFSDRECMAX 8 ///< max. frame size rcv
#define TCLDSMAX 3 ///< max. baudrate divider PICC --> PCD
#define TCLDRMAX 3 ///< max. baudrate divider PCD --> PICC
#define TCLDSDFLT 0 ///< default baudrate divider PICC --> PCD
#define TCLDRDFLT 0 ///< default baudrate divider PCD --> PICC
unsigned char *MSndBuffer;
unsigned char *MRcvBuffer;
MfCmdInfo MInfo;
MfCmdInfo *MpIsrInfo = 0;
unsigned char *MpIsrOut = 0;
unsigned char *MpIsrIn = 0;
unsigned char CountDown;
unsigned char T2IR;
unsigned char RicRxTxBuffer[256];
unsigned char MFIFOLength = DEF_FIFO_LENGTH;
char Mf500PiccAuthState(unsigned char auth_mode,// PICC_AUTHENT1A, PICC_AUTHENT1B
unsigned char *snr, // 4 byte serial number
unsigned char sector); // 0 <= sector <= 15
unsigned char mc500_time=0;
char Mf500PcdConfig(void)
{
unsigned char i;
int status = MI_RESETERR;
unsigned short RstLoopCnt = 0;
unsigned short CmdWaitCnt = 0;
MSndBuffer = RicRxTxBuffer; // initialise send buffer
MRcvBuffer = RicRxTxBuffer; // initialise receive buffer
status = PcdReset();
if (status == MI_OK)
{
WriteRC(RegClockQControl,0x0);
for(i=0;i<105;i++);
ClearBitMask(RegClockQControl,0x40); // clear bit ClkQCalib for
WriteRC(RegBitPhase,0xAD);
WriteRC(RegRxThreshold,0xFF);
WriteRC(RegRxControl2,00);
WriteRC(RegFIFOLevel,0x1A); // initialize to 26d
WriteRC(RegTimerControl,0x02); // TStopRxEnd=0,TStopRxBeg=0,
WriteRC(RegIRqPinConfig,0x3); // interrupt active low enable
PcdRfReset(1); // Rf - reset and enable output driver
}
return status;
}
char Mf500PiccRequest(unsigned char req_code, // request code ALL = 0x52
// or IDLE = 0x26
unsigned char *atq) // answer to request
{
int status = MI_OK;
PcdSetTmo(106);
WriteRC(RegChannelRedundancy,0x03); // RxCRC and TxCRC disable, parity enable
ClearBitMask(RegControl,0x08); // disable crypto 1 unit
WriteRC(RegBitFraming,0x07); // set TxLastBits to 7
ResetInfo(MInfo);
MSndBuffer[0] = req_code;
MInfo.nBytesToSend = 1;
status = PcdSingleResponseCmd(0x1e,MSndBuffer,MRcvBuffer,&MInfo);
if (status) // error occured
{
*atq = 0;
}
else
{
if (MInfo.nBitsReceived != 16) // 2 bytes expected
{
status = MI_BITCOUNTERR;
}
else
{
status = MI_OK;
memcpy(atq,MRcvBuffer,2);
}
}
return status;
}
char Mf500PiccAnticoll (unsigned char bcnt,
unsigned char *snr)
{
int status = MI_OK;
char snr_in[4]; // copy of the input parameter snr
char nbytes = 0; // how many bytes received
char nbits = 0; // how many bits received
char complete = 0; // complete snr recived
char i = 0;
char byteOffset = 0;
unsigned char snr_crc; // check byte calculation
unsigned char snr_check;
unsigned char dummyShift1; // dummy byte for snr shift
unsigned char dummyShift2; // dummy byte for snr shift
if ((status = Mf500PcdSetDefaultAttrib()) == MI_OK)
{
PcdSetTmo(106);
memcpy(snr_in,snr,4);
WriteRC(RegDecoderControl,0x28); // ZeroAfterColl aktivieren
ClearBitMask(RegControl,0x08); // disable crypto 1 unit
complete=0;
while (!complete && (status == MI_OK) )
{
ResetInfo(MInfo);
WriteRC(RegChannelRedundancy,0x03); // RxCRC and TxCRC disable, parity enable
nbits = bcnt % 8; // remaining number of bits
if (nbits)
{
WriteRC(RegBitFraming,nbits << 4 | nbits); // TxLastBits/RxAlign auf nb_bi
nbytes = bcnt / 8 + 1;
if (nbits == 7 )
{
MInfo.cmd = PICC_ANTICOLL1; // pass command flag to ISR
WriteRC(RegBitFraming,nbits); // reset RxAlign to zero
}
}
else
{
nbytes = bcnt / 8;
}
MSndBuffer[0] = 0x93;
MSndBuffer[1] = 0x20 + ((bcnt/8) << 4) + nbits; //number of bytes send
for (i = 0; i < nbytes; i++) // Sende Buffer beschreiben
{
MSndBuffer[i + 2] = snr_in[i];
}
MInfo.nBytesToSend = 2 + nbytes;
status = PcdSingleResponseCmd(0x1e,
MSndBuffer,
MRcvBuffer,
&MInfo);
if (nbits == 7)
{
dummyShift1 = 0x00;
for (i = 0; i < MInfo.nBytesReceived; i++)
{
dummyShift2 = MRcvBuffer[i];
MRcvBuffer[i] = (dummyShift1 >> (i+1)) | (MRcvBuffer[i] << (7-i));
dummyShift1 = dummyShift2;
}
MInfo.nBitsReceived -= MInfo.nBytesReceived; // subtract received parity bits
if ( MInfo.collPos ) MInfo.collPos += 7 - (MInfo.collPos + 6) / 9;
}
if ( status == MI_OK || status == MI_COLLERR) // no other occured
{
if ( MInfo.nBitsReceived != (40 - bcnt) ) // not 5 bytes answered
{
status = MI_BITCOUNTERR;
}
else
{
byteOffset = 0;
if ( nbits != 0 ) // last byte was not complete
{
snr_in[nbytes - 1] = snr_in[nbytes - 1] | MRcvBuffer[0];
byteOffset = 1;
}
for ( i =0; i < (4 - nbytes); i++)
{
snr_in[nbytes + i] = MRcvBuffer[i + byteOffset];
}
if (status != MI_COLLERR ) // no error and no collision
{
snr_crc = snr_in[0] ^ snr_in[1] ^ snr_in[2] ^ snr_in[3];
snr_check = MRcvBuffer[MInfo.nBytesReceived - 1];
if (snr_crc != snr_check)
{
status = MI_SERNRERR;
}
else
{
complete = 1;
}
}
else // collision occured
{
bcnt = bcnt + MInfo.collPos - nbits;
status = MI_OK;
}
}
}
}
}
if (status == MI_OK)
{
memcpy(snr,snr_in,4);
}
else
{
;
}
ClearBitMask(RegDecoderControl,0x20); // ZeroAfterColl disable
return status;
}
char Mf500PcdSetDefaultAttrib(void)
{
int status = MI_OK;
return status;
}
char PcdReset(void)
{
long int i;
int status = MI_OK;
CLEAR_RC500RST(); // clear reset pin
for(i=0;i<50;i++);
SET_RC500RST(); // reset RC500
for(i=0;i<50;i++);
CLEAR_RC500RST();
start_timeout(210);
while (((ReadRawRC(RegCommand) & 0x3F) != 0x3F) && !T2IR);
while ((ReadRawRC(RegCommand) & 0x3F) && !T2IR);
stop_timeout();
if (T2IR)
{
status = MI_RESETERR; // respose of reader IC is not correct
T2IR = 0;
}
if (status == MI_OK)
{
WriteRawRC(RegPage,0x80); // Dummy access in order to determine the bus
for(i=0;i<15;i++);
status= ReadRawRC(RegCommand);
if (status!=0x00)
{
status = MI_INTERFACEERR;
}
else
{
WriteRawRC(RegPage,0x00);; // sequence is ok
}
}
return status;
}
char PcdRfReset(unsigned short ms)
{
int status = MI_OK;
unsigned char i;
ClearBitMask(RegTxControl,0x13); // Tx2RF-En, Tx1RF-En disablen
if (ms > 0)
{
for(i=0;i<1050;i++);
SetBitMask(RegTxControl,0x13); // Tx2RF-En, Tx1RF-En enable
}
return status;
}
void PcdSetTmo(unsigned int tmoLength)
{
switch(tmoLength)
{
case 1: // short timeout (1,0 ms)
WriteRC(RegTimerClock,0x07); // TAutoRestart=0,TPrescale=128
WriteRC(RegTimerReload,0x6a);// TReloadVal = 'h6a =106(dec)
break;
case 2: // medium timeout (1,5 ms)
WriteRC(RegTimerClock,0x07); // TAutoRestart=0,TPrescale=128
WriteRC(RegTimerReload,0xa0);// TReloadVal = 'ha0 =160(dec)
break;
case 3: // long timeout (6 ms)
WriteRC(RegTimerClock,0x09); // TAutoRestart=0,TPrescale=4*128
WriteRC(RegTimerReload,0xa0);// TReloadVal = 'ha0 =160(dec)
break;
case 4: // long timeout (9.6 ms)
WriteRC(RegTimerClock,0x09); // TAutoRestart=0,TPrescale=4*128
WriteRC(RegTimerReload,0xff);// TReloadVal = 'ff =255(dec)
break;
default: // short timeout (1,0 ms)
WriteRC(RegTimerClock,0x07); // TAutoRestart=0,TPrescale=128
WriteRC(RegTimerReload,tmoLength);// TReloadVal = tmoLength
break;
}
}
void SetBitMask(unsigned char reg,unsigned char mask) //
{
char tmp = 0x0;
tmp = ReadRC(reg);
WriteRC(reg,tmp | mask); // set bit mask
}
void ClearBitMask(unsigned char reg,unsigned char mask) //
{
char tmp = 0x0;
tmp = ReadRC(reg);
WriteRC(reg,tmp & ~mask); // clear bit mask
}
void FlushFIFO(void)
{
SetBitMask(RegControl,0x01);
}
#pragma interrupt_handler timer2_ovf_isr:5
void timer2_ovf_isr(void){
TCNT2=0xb2;
if(CountDown)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -