codec.c

dsp常见的扩展外设的框架程序和测试程序

/*********************************************************************
	FILENAME:	CODEC.C
	DESIGNER:	戴展波
	DATE：		2004/10/10
*********************************************************************/

#include <stdio.h>
#include <csl.h>
#include <csl_cache.h>
#include <csl_mcbsp.h>
#include <csl_gpio.h>
#include "CODEC.h"

static MCBSP_Config MyMcbspConfig =
{
	MCBSP_SPCR_RMK 	//Serial Port Control Register (SPCR)
	(        
		MCBSP_SPCR_FREE_YES, 		// Serial clock free running mode(FREE) 
		MCBSP_SPCR_SOFT_YES, 		// Serial clock emulation mode(SOFT)
		MCBSP_SPCR_FRST_YES, 		// Frame sync generator reset(FRST)
		MCBSP_SPCR_GRST_YES, 		// Sample rate generator reset(GRST)
		MCBSP_SPCR_XINTM_XRDY, 		// Transmit interrupt mode(XINTM) 
		MCBSP_SPCR_XSYNCERR_NO,		// Transmit synchronization error  
		MCBSP_SPCR_XRST_YES, 		// Transmitter reset(XRST) 
		MCBSP_SPCR_DLB_OFF,   		// Digital loopback(DLB) mode 
		MCBSP_SPCR_RJUST_LZF,		// Receive data sign-extension and
		 							//   justification mode(RJUST)
		MCBSP_SPCR_CLKSTP_DISABLE, 	// Clock stop(CLKSTP) mode
		MCBSP_SPCR_DXENA_ON, 		// DX Enabler(DXENA) -Extra delay for
									//   DX turn-on time.
		MCBSP_SPCR_RINTM_RRDY, 		// Receive interrupt(RINT) mode
		MCBSP_SPCR_RSYNCERR_NO, 	// Receive synchronization error(RSYNCERR)
		MCBSP_SPCR_RRST_YES 		// Receiver reset(RRST)
	),
    
	MCBSP_RCR_RMK	// Receive Control Register (RCR)
	(  
		MCBSP_RCR_RPHASE_SINGLE, 	// Receive phases 
		MCBSP_RCR_RFRLEN2_OF(0), 	// Receive frame length 
									//   in phase 2(RFRLEN2) 
		MCBSP_RCR_RWDLEN2_32BIT,		// Receive element length 
									//   in phase 2(RWDLEN2)  
		MCBSP_RCR_RCOMPAND_MSB,		// Receive companding mode (RCOMPAND)  
		MCBSP_RCR_RFIG_NO, 		// Receive frame ignore(RFIG)
		MCBSP_RCR_RDATDLY_0BIT,		// Receive data delay(RDATDLY)
		MCBSP_RCR_RFRLEN1_OF(1), 	// Receive frame length 
									//   in phase 1(RFRLEN1)
		MCBSP_RCR_RWDLEN1_32BIT,	// Receive element length 
									//   in phase 1(RWDLEN1)
		MCBSP_RCR_RWDREVRS_DISABLE	// Receive 32-bit bit reversal 
									//   feature.(RWDREVRS)
	),
	MCBSP_XCR_RMK	//Transmit Control Register (XCR)
	(            
		MCBSP_XCR_XPHASE_SINGLE,	// Transmit phases
		MCBSP_XCR_XFRLEN2_OF(0),	// Transmit frame length 
									//   in phase 2(XFRLEN2) 
		MCBSP_XCR_XWDLEN2_32BIT, 	// Transmit element length
		 							//   in phase 2
		MCBSP_XCR_XCOMPAND_MSB, 	// Transmit companding mode(XCOMPAND)
		MCBSP_XCR_XFIG_NO, 		// Transmit frame ignore(XFIG)
		MCBSP_XCR_XDATDLY_0BIT, 	// Transmit data delay(XDATDLY)
		MCBSP_XCR_XFRLEN1_OF(1), 	// Transmit frame length 
									//   in phase 1(XFRLEN1)
		MCBSP_XCR_XWDLEN1_32BIT, 	// Transmit element length 
									//   in phase 1(XWDLEN1)
		MCBSP_XCR_XWDREVRS_DISABLE 	// Transmit 32-bit bit reversal feature
	),
/*	MCBSP_SRGR_RMK	//serial port sample rate generator register(SRGR)
	( 
		MCBSP_SRGR_GSYNC_FREE,		// Sample rate generator clock 
									//   synchronization(GSYNC).
		MCBSP_SRGR_CLKSP_RISING,	// CLKS polarity clock edge select(CLKSP)
		MCBSP_SRGR_CLKSM_INTERNAL,	// MCBSP sample rate generator clock
		 							//   mode(CLKSM)
		MCBSP_SRGR_FSGM_DXR2XSR,	// Sample rate generator transmit frame
			 						//   synchronization
		MCBSP_SRGR_FPER_OF(63),		// Frame period(FPER)
		MCBSP_SRGR_FWID_OF(31),		// Frame width(FWID)
		MCBSP_SRGR_CLKGDV_OF(15)	// Sample rate generator clock
			 						//   divider(CLKGDV)
	),*/
	MCBSP_SRGR_DEFAULT,
	MCBSP_MCR_DEFAULT, 				// Using default value of MCR register
	MCBSP_RCERE0_DEFAULT,			// Using default value of RCERE registers
	MCBSP_RCERE1_DEFAULT,
	MCBSP_RCERE2_DEFAULT,
	MCBSP_RCERE3_DEFAULT,
	MCBSP_XCERE0_DEFAULT,			// Using default value of XCERE registers
	MCBSP_XCERE1_DEFAULT,
	MCBSP_XCERE2_DEFAULT,
	MCBSP_XCERE3_DEFAULT,
	MCBSP_PCR_RMK	//serial port pin control register(PCR)
	(   
		MCBSP_PCR_XIOEN_SP, 		// Transmitter in general-purpose I/O mode
		MCBSP_PCR_RIOEN_SP, 		// Receiver in general-purpose I/O mode
		MCBSP_PCR_FSXM_EXTERNAL, 	// Transmit frame synchronization mode
		MCBSP_PCR_FSRM_EXTERNAL, 	// Receive frame synchronization mode
		MCBSP_PCR_CLKXM_INPUT, 		// Transmitter clock mode (CLKXM)
		MCBSP_PCR_CLKRM_INPUT, 		// Receiver clock mode (CLKRM)
		MCBSP_PCR_CLKSSTAT_0, 		// CLKS pin status(CLKSSTAT)
		MCBSP_PCR_DXSTAT_0,   		// DX pin status(DXSTAT)
		MCBSP_PCR_FSXP_ACTIVEHIGH, 	// Transmit frame synchronization polarity(FSXP)
		MCBSP_PCR_FSRP_ACTIVEHIGH, 	// Receive frame synchronization polarity(FSRP)
		MCBSP_PCR_CLKXP_FALLING, 	// Transmit clock polarity(CLKXP)
		MCBSP_PCR_CLKRP_RISING 	// Receive clock polarity(CLKRP)
	)
};

static Uint32 gpgc = GPIO_GPGC_RMK(
	GPIO_GPGC_GP0M_GPIOMODE,
	GPIO_GPGC_GPINT0M_DEFAULT,
	GPIO_GPGC_GPINTPOL_DEFAULT,
	GPIO_GPGC_LOGIC_DEFAULT,
	GPIO_GPGC_GPINTDV_DEFAULT
);

static Uint32 gpen = GPIO_GPEN_OF(0x09);
static Uint32 gpdir = GPIO_GPDIR_OF(0x09);
static Uint32 gpval = GPIO_GPVAL_OF(0x09);
static Uint32 gphm = GPIO_GPHM_RMK(GPIO_GPHM_GPXHM_DEFAULT);
static Uint32 gplm = GPIO_GPLM_RMK(GPIO_GPLM_GPXLM_DEFAULT);
static Uint32 gppol = GPIO_GPPOL_RMK(GPIO_GPPOL_GPINTXPOL_DEFAULT);

Uint32 audio_data = 0;

GPIO_Handle hGpio;
MCBSP_Handle hMcbsp; 

short i;
short tp1[100];
short tp2[100];
short tp3[100];

void main()
 {
	//初始化CSL
	CSL_init();
	//打开GPIO句柄
	hGpio = GPIO_open(GPIO_DEV0,GPIO_OPEN_RESET);
	//GPIO配置
	GPIO_configArgs(hGpio,gpgc,gpen,gpdir,gpval,gphm,gplm,gppol);
	
	//Open up serial port 2
	hMcbsp = MCBSP_open(MCBSP_DEV2, MCBSP_OPEN_RESET);
  
	//Configure McBSP for digital loopback, 32bit mode
	//  and setup the sample rate generator to allow self clocking
	MCBSP_config(hMcbsp, &MyMcbspConfig);
	
	//Enable McBSP in steps
	MCBSP_start(hMcbsp, 
                MCBSP_RCV_START | MCBSP_XMIT_START, 
                0);
	
	//初始化AIC23
	init_aic23();
	
	//delay1(31,31);
	
	for(;;)
	{
		/* 左通路数据 */
		while (!MCBSP_rrdy(hMcbsp));
		audio_data = MCBSP_read(hMcbsp);
                    
		MCBSP_write(hMcbsp,audio_data);
		
	}
	
}

void init_aic23(void)
{
	Write_Command(Reset_Register,RR_STATUS);
	//设置AIC23各部分功能都工作
	Write_Command(Power_Down_Control,PDC_DEFAULT);
	//设置数字音频接口格式
	Write_Command(Digital_Audio_Inteface_Format,DAIF_MS+DAIF_LRSWAP+DAIF_LRP+DAIF_IWL+DAIF_FOR);
	//设置模拟音频接口格式
	Write_Command(Analog_Aduio_Path_Control,AAPC_STA+AAPC_STE+AAPC_DAC+AAPC_BYP+AAPC_INSEL+AAPC_MICM+AAPC_MICB);
	//设置数字音频通道控制
	Write_Command(Digital_Audio_Path_Control,DAPC_DACM+DAPC_DEEMP+DAPC_ADCHP);
	//ADC采样率设置
	Write_Command(Sample_Rate_Control,SRC_CLKIN+SRC_CLKOUT+SRC_SR+SRC_BOSR+SRC_USB);
	//左耳机音频控制设置
	Write_Command(Left_Headphone_Volume_Control,LHVC_LRS+LHVC_LZC+LHVC_LHV);
	//左通道线形音频控制
	Write_Command(Left_Line_Input_Volume_Control,LLIVC_LRS+LLIVC_LIM+LLIVC_LIV);
	//右耳机音频控制设置
	Write_Command(Right_Headphone_Volume_Control,RHVC_RLS+RHVC_RZC+RHVC_RHV);
	//右通道线形音频控制
	Write_Command(Right_Line_Input_Volume_Control,RLIVC_RLS+RLIVC_RIM+RLIVC_RIV);
	//数字接口激活
	Write_Command(Digital_Interface_Activation,DIA_ACT);
}

void delay_time(Uint32 value)
{
	Uint32 i;
	for(i = 0; i < value; i++);
}

void IIC_SCL_DIR(Uint32 dir)
{
	Uint32 Current_dir;
	switch(dir)
	{
		case OUTPUT:
			//set sclk is output
			Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN0,GPIO_OUTPUT);
			break;
			
		case INPUT:
			//set sdin is input
			Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN0,GPIO_INPUT);
			break;
			
		default:
			break;
	}
}

void IIC_SDA_DIR(Uint32 dir)
{
	Uint32 Current_dir;
	switch(dir)
	{
		case OUTPUT:
			//set sclk is output
			Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN3,GPIO_OUTPUT);
			break;
			
		case INPUT:
			//set sdin is input
			Current_dir = GPIO_pinDirection(hGpio,GPIO_PIN3,GPIO_INPUT);
			break;
			
		default:
			break;
	}
}

void IIC_SCL_OUT(Uint32 data)
{
	//sclk keep high level
	GPIO_pinWrite(hGpio,GPIO_PIN0,data);
}

void IIC_SDA_OUT(Uint32 data)
{
	//sdin start status is low_edge
	GPIO_pinWrite(hGpio,GPIO_PIN3,data);
}

unsigned int IIC_SDA_IN(void)
{
	unsigned int i;
	i = GPIO_pinRead(hGpio,GPIO_PIN3);
	return i;
}

void Write_Command(unsigned int address,unsigned int data)
{
	unsigned int i,temp;
	IIC_SDA_DIR(OUTPUT);
	/*写开始位*/
	Write_Start_bit();
	/*写SLAVE BYTE*/
	Write_IIC(CS_STATE_0);
	/*读ACK应答*/
	i = Read_IIC_ACK();
	if(i == 1)
	{
		while(1);
	}
	temp = (address << 1) & 0xfe;
	if((data & 0x100) == 0x100)
	{
		temp = temp | 0x01;
	}
	/*写register*/
	Write_IIC(temp);	
	/*读ACK应答*/
	i = Read_IIC_ACK();
	if(i == 1)
	{
		while(1);
	}
	temp = data & 0xff;
	/*写control data*/
	Write_IIC(temp);	
	/*读ACK应答*/
	i = Read_IIC_ACK();
	if(i == 1)
	{
		while(1);
	}
	/*写停止位*/
	Write_Stop_bit();
}

void Write_Start_bit(void)
{
	//sdata 输出
	IIC_SDA_DIR(OUTPUT);
	//sclk 输出高电平
	IIC_SCL_OUT(HIGH_LEVEL);
	//sdata 输出高电平
	IIC_SDA_OUT(HIGH_LEVEL);
	delay_time(600);
	IIC_SDA_OUT(LOW_LEVEL);
	delay_time(600);
	IIC_SCL_OUT(LOW_LEVEL);
	delay_time(1300);	
}

void Write_Stop_bit(void)
{
	//sdata 方向输出
	IIC_SDA_DIR(OUTPUT);
	//sdata 数据输出
	IIC_SDA_OUT(LOW_LEVEL);
	IIC_SCL_OUT(HIGH_LEVEL);
	delay_time(600);
	IIC_SDA_OUT(HIGH_LEVEL);
	delay_time(1300);
	IIC_SCL_OUT(LOW_LEVEL);
	delay_time(1300);
}

void Write_IIC(unsigned int Rtc_Var)
{
	int i;
	//sdata 输出,sclk下降沿有效
	IIC_SDA_DIR(OUTPUT);
	for(i = 7; i >= 0; i--)
	{
		//sdata 
		IIC_SDA_OUT((Rtc_Var >> i) & 1);
		IIC_SCL_OUT(HIGH_LEVEL);
		delay_time(600);
		IIC_SCL_OUT(LOW_LEVEL);
		delay_time(1300);
	}
}

unsigned int Read_IIC_ACK(void)
{
	unsigned int i;
	//sdata 方向输入，sclk上降沿有效
	IIC_SDA_DIR(INPUT);
	IIC_SCL_OUT(HIGH_LEVEL);
	delay_time(100);
	i = IIC_SDA_IN();
	i = i & 1;
	delay_time(600);
	IIC_SCL_OUT(LOW_LEVEL);
	delay_time(1300);
	return(i);
}