serial.map.eqn

利用VHDL语言编写的串口程序

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
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-- (including device programming or simulation files), and any 
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--txd_reg is txd_reg
--operation mode is normal

txd_reg_lut_out = A1L241 & (!A1L341) # !A1L241 & (A1L341 & !txd_buf[0] # !A1L341 & (A1L041));
txd_reg = DFFEAS(txd_reg_lut_out, clkbaud8x, !rst, , A1L772, , , , );


--rxd_buf[4] is rxd_buf[4]
--operation mode is normal

rxd_buf[4]_lut_out = rxd_buf[5];
rxd_buf[4] = DFFEAS(rxd_buf[4]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--rxd_buf[5] is rxd_buf[5]
--operation mode is normal

rxd_buf[5]_lut_out = rxd_buf[6];
rxd_buf[5] = DFFEAS(rxd_buf[5]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--rxd_buf[6] is rxd_buf[6]
--operation mode is normal

rxd_buf[6]_lut_out = rxd_buf[7];
rxd_buf[6] = DFFEAS(rxd_buf[6]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--A1L461 is reduce_or~3176
--operation mode is normal

A1L461 = rxd_buf[4] & rxd_buf[5] & (!rxd_buf[6]);


--rxd_buf[3] is rxd_buf[3]
--operation mode is normal

rxd_buf[3]_lut_out = rxd_buf[4];
rxd_buf[3] = DFFEAS(rxd_buf[3]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--rxd_buf[2] is rxd_buf[2]
--operation mode is normal

rxd_buf[2]_lut_out = rxd_buf[3];
rxd_buf[2] = DFFEAS(rxd_buf[2]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--rxd_buf[1] is rxd_buf[1]
--operation mode is normal

rxd_buf[1]_lut_out = rxd_buf[2];
rxd_buf[1] = DFFEAS(rxd_buf[1]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--A1L561 is reduce_or~3177
--operation mode is normal

A1L561 = A1L461 & rxd_buf[3] & !rxd_buf[2] & !rxd_buf[1];


--rxd_buf[7] is rxd_buf[7]
--operation mode is normal

rxd_buf[7]_lut_out = rxd_reg2;
rxd_buf[7] = DFFEAS(rxd_buf[7]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--A1L661 is reduce_or~3178
--operation mode is normal

A1L661 = rxd_buf[4] & rxd_buf[5] & !rxd_buf[6] # !rxd_buf[4] & !rxd_buf[5] & rxd_buf[6];


--A1L761 is reduce_or~3179
--operation mode is normal

A1L761 = rxd_buf[6] & (rxd_buf[5] # rxd_buf[4]) # !rxd_buf[6] & rxd_buf[5] & rxd_buf[4];


--rxd_buf[0] is rxd_buf[0]
--operation mode is normal

rxd_buf[0]_lut_out = rxd_buf[1];
rxd_buf[0] = DFFEAS(rxd_buf[0]_lut_out, clkbaud8x, !rst, , A1L502, , , , );


--A1L861 is reduce_or~3180
--operation mode is normal

A1L861 = rxd_buf[2] & !rxd_buf[1] & rxd_buf[0] # !rxd_buf[2] & (rxd_buf[1] $ (rxd_buf[0] & rxd_buf[6]));


--A1L961 is reduce_or~3181
--operation mode is normal

A1L961 = rxd_buf[0] & !rxd_buf[1] & (rxd_buf[6]) # !rxd_buf[0] & (rxd_buf[2] # rxd_buf[1] & rxd_buf[6]);


--A1L071 is reduce_or~3182
--operation mode is normal

A1L071 = A1L861 & (A1L761 $ A1L961) # !A1L861 & A1L661 & (A1L961);


--A1L171 is reduce_or~3183
--operation mode is normal

A1L171 = !rxd_buf[7] & (A1L561 # !rxd_buf[3] & A1L071);


--A1L271 is reduce_or~3184
--operation mode is normal

A1L271 = rxd_buf[0] & (rxd_buf[5] $ !rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[0] & rxd_buf[1] & (!rxd_buf[2] # !rxd_buf[5]);


--A1L371 is reduce_or~3185
--operation mode is normal

A1L371 = rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & A1L271 # !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !A1L271;


--A1L471 is reduce_or~3186
--operation mode is normal

A1L471 = !rxd_buf[7] & (A1L561 # !rxd_buf[3] & A1L371);


--A1L571 is reduce_or~3187
--operation mode is normal

A1L571 = !rxd_buf[3] & (rxd_buf[4] $ !rxd_buf[5]);


--A1L671 is reduce_or~3188
--operation mode is normal

A1L671 = !rxd_buf[7] & (A1L291 # A1L561 & !rxd_buf[0]);


--A1L771 is reduce_or~3189
--operation mode is normal

A1L771 = rxd_buf[6] & (!rxd_buf[5] & !rxd_buf[4]) # !rxd_buf[6] & rxd_buf[0] & rxd_buf[5] & rxd_buf[4];


--A1L871 is reduce_or~3190
--operation mode is normal

A1L871 = rxd_buf[1] & (rxd_buf[3] # rxd_buf[2] & rxd_buf[0]) # !rxd_buf[1] & (rxd_buf[2] # rxd_buf[0]);


--A1L971 is reduce_or~3191
--operation mode is normal

A1L971 = rxd_buf[2] & (rxd_buf[3] # rxd_buf[1] & rxd_buf[0]) # !rxd_buf[2] & (rxd_buf[1] # rxd_buf[0]);


--A1L081 is reduce_or~3192
--operation mode is normal

A1L081 = A1L871 & (A1L971) # !A1L871 & (A1L971 & A1L661 # !A1L971 & (A1L461));


--A1L181 is reduce_or~3193
--operation mode is normal

A1L181 = !rxd_buf[7] & (A1L871 & A1L771 & !A1L081 # !A1L871 & (A1L081));


--A1L281 is reduce_or~3194
--operation mode is normal

A1L281 = rxd_buf[0] & (rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[0] & (rxd_buf[2]);


--A1L381 is reduce_or~3195
--operation mode is normal

A1L381 = rxd_buf[6] & !rxd_buf[4] & (rxd_buf[1] $ A1L281) # !rxd_buf[6] & rxd_buf[4] & (A1L281 # !rxd_buf[1]);


--A1L481 is reduce_or~3196
--operation mode is normal

A1L481 = !rxd_buf[7] & (A1L561 # A1L571 & A1L381);


--A1L581 is reduce_or~3197
--operation mode is normal

A1L581 = rxd_buf[0] & (rxd_buf[1] & (rxd_buf[6]) # !rxd_buf[1] & rxd_buf[2]) # !rxd_buf[0] & (rxd_buf[2] & rxd_buf[1] # !rxd_buf[2] & (rxd_buf[6]));


--A1L681 is reduce_or~3198
--operation mode is normal

A1L681 = !rxd_buf[7] & (A1L561 # A1L981 & !A1L581);


--A1L781 is reduce_or~3199
--operation mode is normal

A1L781 = rxd_buf[1] & (rxd_buf[5] # rxd_buf[0] $ rxd_buf[2]) # !rxd_buf[1] & (rxd_buf[0] $ (!rxd_buf[2] & rxd_buf[5]));


--A1L881 is reduce_or~3200
--operation mode is normal

A1L881 = !rxd_buf[7] & (A1L561 # A1L091 & A1L781);


--txd_buf[0] is txd_buf[0]
--operation mode is normal

txd_buf[0]_lut_out = A1L262 # A1L362 # !state_tras[1] & !A1L152;
txd_buf[0] = DFFEAS(txd_buf[0]_lut_out, clkbaud8x, !rst, , A1L352, , , , );


--div8_tras_reg[2] is div8_tras_reg[2]
--operation mode is normal

div8_tras_reg[2]_lut_out = !div8_tras_reg[2];
div8_tras_reg[2] = DFFEAS(div8_tras_reg[2]_lut_out, clkbaud8x, !rst, , A1L701, , , , );


--div8_tras_reg[1] is div8_tras_reg[1]
--operation mode is normal

div8_tras_reg[1]_lut_out = !div8_tras_reg[1];
div8_tras_reg[1] = DFFEAS(div8_tras_reg[1]_lut_out, clkbaud8x, !rst, , A1L501, , , , );


--div8_tras_reg[0] is div8_tras_reg[0]
--operation mode is normal

div8_tras_reg[0]_lut_out = !div8_tras_reg[0];
div8_tras_reg[0] = DFFEAS(div8_tras_reg[0]_lut_out, clkbaud8x, !rst, , trasstart, , , , );


--A1L751 is reduce_nor~227
--operation mode is normal

A1L751 = div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0];


--trasstart is trasstart
--operation mode is normal

trasstart_lut_out = state_tras[3] & (A1L641 # A1L441 & A1L541) # !state_tras[3] & A1L441 & A1L541;
trasstart = DFFEAS(trasstart_lut_out, clkbaud8x, !rst, , A1L742, , , , );


--send_state[0] is send_state[0]
--operation mode is normal

send_state[0]_lut_out = send_state[0] $ (div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0]);
send_state[0] = DFFEAS(send_state[0]_lut_out, clkbaud8x, !rst, , A1L322, , , , );


--send_state[2] is send_state[2]
--operation mode is normal

send_state[2]_lut_out = !send_state[2];
send_state[2] = DFFEAS(send_state[2]_lut_out, clkbaud8x, !rst, , A1L422, , , , );


--send_state[1] is send_state[1]
--operation mode is normal

send_state[1]_lut_out = !send_state[1];
send_state[1] = DFFEAS(send_state[1]_lut_out, clkbaud8x, !rst, , A1L022, , , , );


--A1L931 is Mux~3235
--operation mode is normal

A1L931 = trasstart & (!send_state[1] # !send_state[2] # !send_state[0]);


--A1L041 is Mux~3236
--operation mode is normal

A1L041 = txd_reg # A1L751 & A1L931;


--state_tras[0] is state_tras[0]
--operation mode is normal

state_tras[0]_lut_out = state_tras[0] & !A1L751 # !state_tras[0] & A1L751 & !A1L941;
state_tras[0] = DFFEAS(state_tras[0]_lut_out, clkbaud8x, !rst, , key_entry2, , , , );


--state_tras[2] is state_tras[2]
--operation mode is normal

state_tras[2]_lut_out = state_tras[2] $ (A1L751 & state_tras[0] & state_tras[1]);
state_tras[2] = DFFEAS(state_tras[2]_lut_out, clkbaud8x, !rst, , key_entry2, , , , );


--state_tras[1] is state_tras[1]
--operation mode is normal

state_tras[1]_lut_out = state_tras[1] $ (A1L751 & state_tras[0]);
state_tras[1] = DFFEAS(state_tras[1]_lut_out, clkbaud8x, !rst, , key_entry2, , , , );


--A1L141 is Mux~3237
--operation mode is normal

A1L141 = !state_tras[2] & !state_tras[1];


--state_tras[3] is state_tras[3]
--operation mode is normal

state_tras[3]_lut_out = state_tras[3] $ (A1L751 & A1L841);
state_tras[3] = DFFEAS(state_tras[3]_lut_out, clkbaud8x, !rst, , key_entry2, , , , );


--A1L241 is Mux~3238
--operation mode is normal

A1L241 = state_tras[3] & (state_tras[0] & A1L751 # !A1L141);


--A1L341 is Mux~3239
--operation mode is normal

A1L341 = A1L751 & (A1L141 & (state_tras[0] # state_tras[3]) # !A1L141 & (!state_tras[3]));


--clkbaud8x is clkbaud8x
--operation mode is normal

clkbaud8x_lut_out = !clkbaud8x;
clkbaud8x = DFFEAS(clkbaud8x_lut_out, clk, !rst, , A1L261, , , , );


--key_entry2 is key_entry2
--operation mode is normal

key_entry2_lut_out = A1L631;
key_entry2 = DFFEAS(key_entry2_lut_out, clkbaud8x, !rst, , , key_entry1, , , !key_entry2);


--A1L772 is txd_reg~121
--operation mode is normal

A1L772 = key_entry2 & (!state_tras[2] & !state_tras[1] # !state_tras[3]);


--div8_rec_reg[2] is div8_rec_reg[2]
--operation mode is normal

div8_rec_reg[2]_lut_out = !div8_rec_reg[2];
div8_rec_reg[2] = DFFEAS(div8_rec_reg[2]_lut_out, clkbaud8x, !rst, , A1L101, , , , );


--div8_rec_reg[1] is div8_rec_reg[1]
--operation mode is normal

div8_rec_reg[1]_lut_out = !div8_rec_reg[1];
div8_rec_reg[1] = DFFEAS(div8_rec_reg[1]_lut_out, clkbaud8x, !rst, , A1L99, , , , );


--div8_rec_reg[0] is div8_rec_reg[0]
--operation mode is normal

div8_rec_reg[0]_lut_out = !div8_rec_reg[0];
div8_rec_reg[0] = DFFEAS(div8_rec_reg[0]_lut_out, clkbaud8x, !rst, , recstart, , , , );


--A1L402 is rxd_buf[7]~74
--operation mode is normal

A1L402 = div8_rec_reg[2] & div8_rec_reg[1] & div8_rec_reg[0];


--state_rec[2] is state_rec[2]
--operation mode is normal

state_rec[2]_lut_out = A1L632 & state_rec[2] # !A1L632 & !A1L042 & (state_rec[2] $ A1L1);
state_rec[2] = DFFEAS(state_rec[2]_lut_out, clkbaud8x, !rst, , , , , , );


--state_rec[1] is state_rec[1]
--operation mode is normal

state_rec[1]_lut_out = A1L632 & state_rec[1] # !A1L632 & !A1L042 & (state_rec[1] $ state_rec[0]);
state_rec[1] = DFFEAS(state_rec[1]_lut_out, clkbaud8x, !rst, , , , , , );


--A1L251 is recstart~107
--operation mode is normal

A1L251 = !state_rec[2] & !state_rec[1];


--state_rec[0] is state_rec[0]
--operation mode is normal

state_rec[0]_lut_out = state_rec[0] & A1L632 # !state_rec[0] & !A1L632 & (!A1L042);
state_rec[0] = DFFEAS(state_rec[0]_lut_out, clkbaud8x, !rst, , , , , , );


--state_rec[3] is state_rec[3]
--operation mode is normal

state_rec[3]_lut_out = A1L632 & state_rec[3] # !A1L632 & !A1L042 & (state_rec[3] $ A1L2);
state_rec[3] = DFFEAS(state_rec[3]_lut_out, clkbaud8x, !rst, , , , , , );


--A1L502 is rxd_buf[7]~75
--operation mode is normal

A1L502 = A1L402 & (state_rec[3] $ (state_rec[0] # !A1L251));


--rxd_reg2 is rxd_reg2
--operation mode is normal

rxd_reg2_lut_out = rxd_reg1;
rxd_reg2 = DFFEAS(rxd_reg2_lut_out, clkbaud8x, !rst, , , , , , );


--A1L222 is send_state[2]~115
--operation mode is normal

A1L222 = state_tras[3] & state_tras[1];


--A1L262 is txd_buf~1740
--operation mode is normal

A1L262 = A1L222 & (send_state[2] & (!send_state[1]) # !send_state[2] & (send_state[1] # !send_state[0]));


--txd_buf[1] is txd_buf[1]
--operation mode is normal

txd_buf[1]_lut_out = A1L652 & (txd_buf[2]) # !A1L652 & A1L462;
txd_buf[1] = DFFEAS(txd_buf[1]_lut_out, clkbaud8x, !rst, , A1L352, VCC, , , !key_entry2);


--A1L362 is txd_buf~1741
--operation mode is normal

A1L362 = txd_buf[1] & (!state_tras[1] # !state_tras[3]) # !key_entry2;


--A1L152 is txd_buf[0]~1742
--operation mode is normal

A1L152 = state_tras[2] # !state_tras[0] # !state_tras[3];


--A1L252 is txd_buf[0]~1744
--operation mode is normal

A1L252 = state_tras[0] & state_tras[3] & (state_tras[2] $ state_tras[1]) # !state_tras[0] & (state_tras[3] $ (!state_tras[2] & !state_tras[1]));


--key_entry1 is key_entry1
--operation mode is normal

key_entry1_lut_out = key_entry1 # !A1L551 & (!key_input);
key_entry1 = DFFEAS(key_entry1_lut_out, clk, !rst, , , , , key_entry2, );


--A1L352 is txd_buf[0]~1745
--operation mode is normal

A1L352 = key_entry2 & !A1L252 & A1L751 # !key_entry2 & (key_entry1);


--A1L701 is div8_tras_reg[2]~59
--operation mode is normal

A1L701 = div8_tras_reg[1] & div8_tras_reg[0] & trasstart;


--A1L501 is div8_tras_reg[1]~60
--operation mode is normal

A1L501 = div8_tras_reg[0] & trasstart;


--A1L441 is Mux~3241
--operation mode is normal

A1L441 = !state_tras[3] & !state_tras[0] & !state_tras[2] & !state_tras[1];


--A1L541 is Mux~3242
--operation mode is normal

A1L541 = trasstart # !send_state[1] # !send_state[2] # !send_state[0];


--A1L452 is txd_buf[0]~1746
--operation mode is normal

A1L452 = state_tras[2] & (!state_tras[0] # !state_tras[1]) # !state_tras[2] & state_tras[1];


--A1L641 is Mux~3243
--operation mode is normal

A1L641 = A1L751 & A1L452 # !A1L751 & (trasstart & !A1L141);


--A1L741 is Mux~3245
--operation mode is normal

A1L741 = state_tras[1] & (!state_tras[3]) # !state_tras[1] & (state_tras[2] & (!state_tras[3]) # !state_tras[2] & (state_tras[0] # state_tras[3]));


--A1L742 is trasstart~39
--operation mode is normal

A1L742 = key_entry2 & (!A1L741);


--A1L322 is send_state[2]~116
--operation mode is normal

A1L322 = key_entry2 & state_tras[0] & state_tras[2] & A1L222;


--A1L422 is send_state[2]~117
--operation mode is normal

A1L422 = A1L751 & send_state[0] & send_state[1] & A1L322;


--A1L022 is send_state[1]~118
--operation mode is normal

A1L022 = A1L751 & send_state[0] & A1L322;


--A1L841 is Mux~3249
--operation mode is normal

A1L841 = state_tras[0] & state_tras[2] & state_tras[1];


--div_reg[15] is div_reg[15]