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📄 un_autocameracontrol.asm

📁 用于DSP下摄像机的图像抓取、图像处理和传输、以及与上位机TCP/IP通信的工程文件。基于Texas Instruments Code Composer Studio实现。
💻 ASM
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;** --------------------------------------------------------------------------*
   [ B2]   B       .S1     L21

           ADD     .D1X    B0,A23,A23        ; |334| 
||         ADD     .S1     A22,A17,A3

           NOP             1
   [ B2]   MV      .D2X    A3,B6
   [ B2]   LDBU    .D2T2   *+B6(1),B7        ; |331| (P) <0,0> 

   [ B2]   LDBU    .D2T2   *B6++(2),B8       ; |332| (P) <0,1> 
|| [ B2]   LDBU    .D1T1   *+A17(1),A3       ; |332| (P) <0,1> 

           ; BRANCH OCCURS  
;** --------------------------------------------------------------------------*
;**   BEGIN LOOP L20
;** --------------------------------------------------------------------------*
L20:    
           LDBU    .D1T1   *+A3(1),A6        ; |331| 
           LDBU    .D1T1   *+A17(1),A4       ; |332| 
           LDBU    .D1T1   *A3++(2),A5       ; |332| 
           SUB     .D2     B0,1,B0           ; |335| 
           LDBU    .D1T1   *A17++(2),A8      ; |333| 
           ADDU    .L1     A6,A13:A12,A13:A12 ; |331| 
   [ B0]   B       .S1     L20               ; |335| 
           ADD     .D1     A5,A4,A4          ; |332| 
           SHR     .S1     A4,1,A4           ; |332| 
           SHR     .S1     A4,31,A5          ; |332| 

           ADDU    .L1     A20,A5:A4,A21:A20 ; |332| 
||         MV      .D1     A21,A7            ; |332| 

           ADD     .D1     A7,A21,A21        ; |332| 
||         ADDU    .L1     A8,A11:A10,A11:A10 ; |333| 

           ; BRANCH OCCURS                   ; |335| 
;** --------------------------------------------------------------------------*
           BNOP    .S1     L26,4
           SUB     .D2     B1,1,B1           ; |336| 
           ; BRANCH OCCURS  
;** --------------------------------------------------------------------------*
L21:    
           MV      .D1     A10,A6
           MV      .D2X    A12,B4

           SUB     .D2     B0,2,B0
||         MV      .S2X    A13,B5
||         MV      .D1     A11,A7
||         MV      .S1     A21,A9
||         MV      .L1     A20,A8

;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop source line                 : 329
;*      Loop opening brace source line   : 330
;*      Loop closing brace source line   : 335
;*      Known Minimum Trip Count         : 1
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 2
;*      Unpartitioned Resource Bound     : 3
;*      Partitioned Resource Bound(*)    : 3
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     2        1     
;*      .S units                     2        1     
;*      .D units                     2        2     
;*      .M units                     0        0     
;*      .X cross paths               1        0     
;*      .T address paths             2        2     
;*      Long read paths              2        1     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          3        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             2        1     
;*      Bound(.L .S .D .LS .LSD)     3*       2     
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 6  Schedule found with 2 iterations in parallel
;*
;*      Register Usage Table:
;*          +-----------------------------------------------------------------+
;*          |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;*          |00000000001111111111222222222233|00000000001111111111222222222233|
;*          |01234567890123456789012345678901|01234567890123456789012345678901|
;*          |--------------------------------+--------------------------------|
;*       0: |   *  ****       *              |*   *****                       |
;*       1: |   *  ***       ***             |*   *** *                       |
;*       2: |   *  ***       ***             |*   ****                        |
;*       3: |   ** ***       ***             |*   *****                       |
;*       4: |   ******       ***             |*   *****                       |
;*       5: |   *  ****      ***             |*   *****                       |
;*          +-----------------------------------------------------------------+
;*
;*      Done
;*
;*      Loop is interruptible
;*      Epilog not removed
;*      Collapsed epilog stages     : 0
;*
;*      Prolog not removed
;*      Collapsed prolog stages     : 0
;*
;*      Minimum required memory pad : 0 bytes
;*
;*      For further improvement on this loop, try option -mh2
;*
;*      Minimum safe trip count     : 2
;*----------------------------------------------------------------------------*
;*        SINGLE SCHEDULED ITERATION
;*
;*        C170:
;*   0              LDBU    .D2T2   *+B6(1),B7        ; |331| 
;*   1              LDBU    .D1T1   *+A17(1),A3       ; |332| 
;*       ||         LDBU    .D2T2   *B6++(2),B8       ; |332| 
;*   2              NOP             3
;*   5              ADDU    .L2     B7,B5:B4,B5:B4    ; |331| 
;*       ||         MV      .S1     A9,A16            ; |332|  ^ 
;*       ||         LDBU    .D1T1   *A17++(2),A18     ; |333| 
;*       || [ B0]   BDEC    .S2     C170,B0           ; |335| 
;*   6              ADD     .D1X    B8,A3,A3          ; |332| 
;*   7              SHR     .S1     A3,1,A4           ; |332| 
;*   8              SHR     .S1     A4,31,A5          ; |332| 
;*   9              ADDU    .L1     A8,A5:A4,A9:A8    ; |332|  ^ 
;*  10              ADD     .D1     A16,A9,A9         ; |332|  ^ 
;*       ||         ADDU    .L1     A18,A7:A6,A7:A6   ; |333| 
;*                  ; BRANCH OCCURS                   ; |335| 
;*----------------------------------------------------------------------------*
L22:    ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L23:    ; PIPED LOOP KERNEL

           ADDU    .L2     B7,B5:B4,B5:B4    ; |331| <0,5> 
||         MV      .S1     A9,A16            ; |332| <0,5>  ^ 
||         LDBU    .D1T1   *A17++(2),A18     ; |333| <0,5> 
|| [ B0]   BDEC    .S2     L23,B0            ; |335| <0,5> 

           ADD     .D1X    B8,A3,A3          ; |332| <0,6> 
||         LDBU    .D2T2   *+B6(1),B7        ; |331| <1,0> 

           SHR     .S1     A3,1,A4           ; |332| <0,7> 
||         LDBU    .D1T1   *+A17(1),A3       ; |332| <1,1> 
||         LDBU    .D2T2   *B6++(2),B8       ; |332| <1,1> 

           SHR     .S1     A4,31,A5          ; |332| <0,8> 
           ADDU    .L1     A8,A5:A4,A9:A8    ; |332| <0,9>  ^ 

           ADDU    .L1     A18,A7:A6,A7:A6   ; |333| <0,10> 
||         ADD     .D1     A16,A9,A9         ; |332| <0,10>  ^ 

;** --------------------------------------------------------------------------*
L24:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*

           MV      .S1     A9,A16            ; |332| (E) <1,5>  ^ 
||         ADDU    .L2     B7,B5:B4,B5:B4    ; |331| (E) <1,5> 
||         LDBU    .D1T1   *A17++(2),A18     ; |333| (E) <1,5> 

           ADD     .D1X    B8,A3,A3          ; |332| (E) <1,6> 

           MV      .D1X    B4,A12
||         SHR     .S1     A3,1,A4           ; |332| (E) <1,7> 

           MV      .D1X    B5,A13
||         SHR     .S1     A4,31,A5          ; |332| (E) <1,8> 

           ADDU    .L1     A8,A5:A4,A9:A8    ; |332| (E) <1,9>  ^ 

           ADD     .D1     A16,A9,A21        ; |332| 
||         MV      .S1     A8,A20
||         ADDU    .L1     A18,A7:A6,A7:A6   ; |333| (E) <1,10> 

           MV      .D1     A6,A10
||         MV      .S1     A7,A11

;** --------------------------------------------------------------------------*
L25:    
           SUB     .D2     B1,1,B1           ; |336| 
;** --------------------------------------------------------------------------*
L26:    
   [ B1]   BNOP    .S1     L19,4             ; |336| 

           ADD     .D1     A24,A19,A19       ; |336| 
|| [ B1]   CMPGT   .L1     A22,0,A0          ; |329| 

           ; BRANCH OCCURS                   ; |336| 
;** --------------------------------------------------------------------------*
           BNOP    .S1     L46,3             ; |336| 
           MVKL    .S2     __divul,B6        ; |367| 
           MVKH    .S2     __divul,B6        ; |367| 
           ; BRANCH OCCURS                   ; |336| 
;** --------------------------------------------------------------------------*
L27:    
   [!B2]   BNOP    .S1     L46,1             ; |312| 
           ADD     .D2     1,B5,B4           ; |314| 

           SHR     .S2     B4,1,B1           ; |314| 
||         ADD     .D1     1,A22,A9
||         ADD     .S1     A22,A22,A16
||         MV      .L1X    B0,A8

   [!B2]   MVKL    .S2     __divul,B6        ; |367| 
   [!B2]   MVKH    .S2     __divul,B6        ; |367| 
           ; BRANCH OCCURS                   ; |312| 
;** --------------------------------------------------------------------------*
           CMPGT   .L1     A22,0,A0          ; |315| 
;** --------------------------------------------------------------------------*
;**   BEGIN LOOP L28
;** --------------------------------------------------------------------------*
L28:    
   [!A0]   B       .S1     L32               ; |315| 

           MV      .S2X    A8,B17            ; |314| 
|| [!A0]   SUB     .D2     B1,1,B1           ; |322| 

   [ A0]   MV      .D2X    A20,B4
   [ A0]   MV      .D2X    A10,B8

   [ A0]   MV      .D1     A12,A4
|| [ A0]   ADD     .D2X    A22,B17,B5

   [ A0]   MVK     .D1     0x1,A1            ; init prolog collapse predicate
|| [ A0]   MV      .L1     A13,A5
|| [ A0]   MV      .D2X    A11,B9
|| [ A0]   SHR     .S1     A9,1,A6           ; |317| 

           ; BRANCH OCCURS                   ; |315| 
;** --------------------------------------------------------------------------*

           MV      .D2X    A21,B5
||         SUB     .S2     B17,2,B17
||         SUB     .D1     A6,1,A0
||         ADD     .S1     A6,A23,A23        ; |320| 
||         SUB     .L1X    B5,2,A3

;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop source line                 : 315
;*      Loop opening brace source line   : 316
;*      Loop closing brace source line   : 321
;*      Known Minimum Trip Count         : 1
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 2
;*      Unpartitioned Resource Bound     : 3
;*      Partitioned Resource Bound(*)    : 3
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     1        2     
;*      .S units                     1        2     
;*      .D units                     2        2     
;*      .M units                     0        0     
;*      .X cross paths               0        1     
;*      .T address paths             2        2     
;*      Long read paths              1        2     
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          0        3     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1        2     
;*      Bound(.L .S .D .LS .LSD)     2        3*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 6  Schedule found with 2 iterations in parallel
;*
;*      Register Usage Table:
;*          +-----------------------------------------------------------------+
;*          |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;*          |00000000001111111111222222222233|00000000001111111111222222222233|
;*          |01234567890123456789012345678901|01234567890123456789012345678901|
;*          |--------------------------------+--------------------------------|
;*       0: |** *****                        |    **  **      ** *            |
;*       1: |** *** *                        |    *   **      ****            |
;*       2: |** ****                         |    **  **       ***            |
;*       3: |** *****                        |    * * **      ***             |
;*       4: |** *****                        |    * ****      ****            |
;*       5: |** *****                        |    **  **      ****            |
;*          +-----------------------------------------------------------------+
;*
;*      Done
;*
;*      Loop is interruptible
;*      Epilog not removed

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