📄 un_autocameracontrol.asm
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;******************************************************************************
;* TMS320C6x C/C++ Codegen PC Version 4.32 *
;* Date/Time created: Tue Apr 14 17:53:26 2009 *
;******************************************************************************
;******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C64xx *
;* Optimization : Enabled at level 3 *
;* Optimizing for : Speed *
;* Based on options: -o3, no -ms *
;* Endian : Little *
;* Interrupt Thrshld : 100 *
;* Memory Model : Large *
;* Calls to RTS : Far *
;* Pipelining : Enabled *
;* Speculative Load : Disabled *
;* Memory Aliases : Presume are aliases (pessimistic) *
;* Debug Info : No Debug Info *
;* *
;******************************************************************************
.asg A15, FP
.asg B14, DP
.asg B15, SP
.global $bss
; c:\ti\c6000\cgtools\bin\opt6x.exe -a -DI100 -v6400 -q -O3 C:\DOCUME~1\yn\LOCALS~1\Temp\TI1812_2 C:\DOCUME~1\yn\LOCALS~1\Temp\TI1812_5 -w ../TMP
.sect ".text"
.global _UAGE_GetMeanBrightness__FPUciT215UAGE_COLOR_MODERi
;******************************************************************************
;* FUNCTION NAME: _UAGE_GetMeanBrightness(unsigned char *, int, int, UAGE_COLOR_MODE, int &)*
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, *
;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, *
;* B13,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24,A25, *
;* A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20,B21, *
;* B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, *
;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, *
;* B13,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24,A25, *
;* A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20,B21, *
;* B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Local Frame Size : 0 Args + 0 Auto + 44 Save = 44 byte *
;******************************************************************************
_UAGE_GetMeanBrightness__FPUciT215UAGE_COLOR_MODERi:
;** --------------------------------------------------------------------------*
MV .D1X B4,A22 ; |263|
MV .D2X A6,B5 ; |263|
MPYLH .M2X B5,A22,B7 ; |269|
MPYLH .M1X A22,B5,A3 ; |269|
ZERO .D2 B4 ; |264|
|| CMPGT .L1 A6,0,A4 ; |264|
|| CMPGT .L2 B4,0,B8 ; |264|
|| MV .S2X A4,B0 ; |263|
XOR .D2 1,B8,B7 ; |264|
|| ADD .D1X B7,A3,A3 ; |269|
|| [!B0] MVK .S2 0x1,B4 ; |264|
|| XOR .S1 1,A4,A4 ; |264|
OR .D2 B7,B4,B7 ; |264|
OR .D2X A4,B7,B1 ; |264|
[ B1] BNOP .S1 L6,1 ; |264|
MPYU .M2X B5,A22,B4 ; |269|
|| STW .D2T1 A15,*SP--(48) ; |263|
|| MV .D1X SP,A31 ; |263|
SHL .S1 A3,16,A3 ; |269|
|| STW .D1T1 A14,*-A31(24)
|| STDW .D2T2 B13:B12,*+SP(40)
STDW .D1T1 A13:A12,*-A31(32)
|| STDW .D2T2 B11:B10,*+SP(32)
|| MV .S1X B6,A0 ; |263|
ADD .S2X B4,A3,B4 ; |269|
|| ADD .S1X B4,A3,A19 ; |269|
|| STW .D2T2 B3,*+SP(28)
|| MV .L1 A8,A14 ; |263|
|| STDW .D1T1 A11:A10,*-A31(40)
; BRANCH OCCURS ; |264|
;** --------------------------------------------------------------------------*
[ A0] BNOP .S1 L5,2 ; |275|
ZERO .D1 A21 ; |271|
|| ZERO .L1 A5:A4 ; |270|
ZERO .L1 A13:A12 ; |271|
|| ZERO .D1 A20 ; |271|
|| ZERO .S1 A11 ; |271|
CMPEQ .L1 A0,1,A1 ; |284|
|| MV .D1X B0,A3 ; |277|
|| CMPGT .L2 B4,0,B1 ; |279|
|| ZERO .S1 A10 ; |271|
; BRANCH OCCURS ; |275|
;** --------------------------------------------------------------------------*
[!B1] BNOP .S1 L4,3 ; |279|
[ B1] SUB .D2 B4,1,B0
|| [!B1] MVKL .S2 __divul,B6 ; |281|
[!B1] MVKH .S2 __divul,B6 ; |281|
; BRANCH OCCURS ; |279|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 279
;* Loop closing brace source line : 280
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 0
;* Unpartitioned Resource Bound : 1
;* Partitioned Resource Bound(*) : 1
;* Resource Partition:
;* A-side B-side
;* .L units 1* 0
;* .S units 0 1*
;* .D units 1* 0
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 1* 0
;* Long read paths 1* 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 0 0 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1* 1*
;* Bound(.L .S .D .LS .LSD) 1* 1*
;*
;* Searching for software pipeline schedule at ...
;* ii = 6 Schedule found with 1 iterations in parallel
;*
;* Register Usage Table:
;* +-----------------------------------------------------------------+
;* |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;* |00000000001111111111222222222233|00000000001111111111222222222233|
;* |01234567890123456789012345678901|01234567890123456789012345678901|
;* |--------------------------------+--------------------------------|
;* 0: | *** |* |
;* 1: | **** |* |
;* 2: | **** |* |
;* 3: | **** |* |
;* 4: | **** |* |
;* 5: | **** |* |
;* +-----------------------------------------------------------------+
;*
;* Done
;*
;* Loop is interruptible
;* Collapsed epilog stages : 0
;* Collapsed prolog stages : 0
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
;* SINGLE SCHEDULED ITERATION
;*
;* C43:
;* 0 LDBU .D1T1 *A3++,A6 ; |280|
;* || [ B0] BDEC .S2 C43,B0 ; |280|
;* 1 NOP 4
;* 5 ADDU .L1 A6,A5:A4,A5:A4 ; |280|
;* ; BRANCH OCCURS ; |280|
;*----------------------------------------------------------------------------*
L1: ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L2: ; PIPED LOOP KERNEL
[ B0] BDEC .S2 L2,B0 ; |280| <0,0>
|| LDBU .D1T1 *A3++,A6 ; |280| <0,0>
NOP 4
ADDU .L1 A6,A5:A4,A5:A4 ; |280| <0,5>
;** --------------------------------------------------------------------------*
L3: ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
MVKL .S2 __divul,B6 ; |281|
MVKH .S2 __divul,B6 ; |281|
;** --------------------------------------------------------------------------*
L4:
CALL .S2 B6 ; |281|
SHR .S1 A19,31,A3 ; |281|
MV .D2X A19,B4 ; |281|
ADDKPC .S2 RL0,B3,1 ; |281|
MV .D2X A3,B5 ; |281|
RL0: ; CALL OCCURS ; |281|
B .S1 L47 ; |282|
MVK .S1 0x1,A4 ; |369|
|| STW .D1T1 A4,*A14 ; |367|
|| LDW .D2T2 *+SP(28),B3 ; |370|
MV .S1X SP,A31 ; |370|
LDDW .D1T1 *+A31(16),A13:A12 ; |370|
LDDW .D2T2 *+SP(32),B11:B10 ; |370|
LDDW .D1T1 *+A31(8),A11:A10 ; |370|
; BRANCH OCCURS ; |282|
;** --------------------------------------------------------------------------*
L5:
[ A1] BNOP .S1 L42,4 ; |284|
ZERO .D1 A23 ; |272|
|| CMPEQ .L2X A0,2,B1 ; |295|
|| CMPGT .L1 A19,0,A2 ; |287|
; BRANCH OCCURS ; |284|
;** --------------------------------------------------------------------------*
[ B1] BNOP .S1 L33,4 ; |295|
CMPEQ .L1 A0,3,A1 ; |310|
|| CMPGT .L2 B5,0,B2 ; |297|
; BRANCH OCCURS ; |295|
;** --------------------------------------------------------------------------*
[ A1] BNOP .S1 L27,4 ; |310|
CMPEQ .L1 A0,4,A2 ; |324|
|| CMPGT .L2 B5,0,B2 ; |312|
; BRANCH OCCURS ; |310|
;** --------------------------------------------------------------------------*
[ A2] BNOP .S1 L18,4 ; |324|
CMPEQ .L1 A0,5,A1 ; |338|
|| CMPGT .L2 B5,0,B2 ; |326|
; BRANCH OCCURS ; |324|
;** --------------------------------------------------------------------------*
[ A1] BNOP .S1 L12,4 ; |338|
CMPEQ .L1 A0,6,A0 ; |352|
|| CMPGT .L2 B5,0,B1 ; |340|
; BRANCH OCCURS ; |338|
;** --------------------------------------------------------------------------*
[ A0] BNOP .S1 L7,4 ; |352|
CMPGT .L1 A19,0,A1 ; |356|
; BRANCH OCCURS ; |352|
;** --------------------------------------------------------------------------*
L6:
B .S1 L47 ; |365|
ZERO .D1 A4 ; |365|
|| LDW .D2T2 *+SP(28),B3 ; |370|
MV .D1X SP,A31 ; |370|
LDDW .D1T1 *+A31(16),A13:A12 ; |370|
LDDW .D1T1 *+A31(8),A11:A10 ; |370|
LDDW .D2T2 *+SP(32),B11:B10 ; |370|
; BRANCH OCCURS ; |365|
;** --------------------------------------------------------------------------*
L7:
[!A1] BNOP .S1 L11,3 ; |356|
[ A1] SUB .D2 B4,1,B0
|| [!A1] MVKL .S2 __divul,B6 ; |361|
[!A1] MVKH .S2 __divul,B6 ; |361|
; BRANCH OCCURS ; |356|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 356
;* Loop opening brace source line : 357
;* Loop closing brace source line : 360
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 0
;* Unpartitioned Resource Bound : 1
;* Partitioned Resource Bound(*) : 1
;* Resource Partition:
;* A-side B-side
;* .L units 1* 0
;* .S units 0 1*
;* .D units 1* 0
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