voptqq72vx

ARM10 INSTALALTION GUIDE

library verilog;
use verilog.vl_types.all;
entity registerfile is
    port(
        RF_Addr_A       : in     vl_logic_vector(3 downto 0);
        RF_Addr_B       : in     vl_logic_vector(3 downto 0);
        RF_Addr_C       : in     vl_logic_vector(3 downto 0);
        RF_Addr_Write   : in     vl_logic_vector(3 downto 0);
        RF_Bus_Write    : in     vl_logic_vector(31 downto 0);
        RF_Load_Write   : in     vl_logic;
        RF_PC_Write     : in     vl_logic_vector(31 downto 0);
        RF_Flags_Write  : in     vl_logic_vector(10 downto 0);
        RF_Load_Flags   : in     vl_logic;
        RF_PSR_R_Sel    : in     vl_logic;
        RF_PSR_W_Sel    : in     vl_logic;
        RF_Bus_A        : out    vl_logic_vector(31 downto 0);
        RF_Bus_B        : out    vl_logic_vector(31 downto 0);
        RF_Bus_C        : out    vl_logic_vector(31 downto 0);
        RF_PC_Read      : out    vl_logic_vector(31 downto 0);
        RF_PSR_Read     : out    vl_logic_vector(31 downto 0);
        sysclk          : in     vl_logic
    );
end registerfile;