📄 maskbits.h
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#ifdef __GNUC__ /* XXX don't want for Alpha? */#ifdef vax#define FASTGETBITS(psrc,x,w,dst) \ __asm ("extzv %1,%2,%3,%0" \ : "=g" (dst) \ : "g" (x), "g" (w), "m" (*(char *)(psrc)))#define getbits(psrc,x,w,dst) FASTGETBITS(psrc,x,w,dst)#define FASTPUTBITS(src, x, w, pdst) \ __asm ("insv %3,%1,%2,%0" \ : "=m" (*(char *)(pdst)) \ : "g" (x), "g" (w), "g" (src))#define putbits(src, x, w, pdst) FASTPUTBITS(src, x, w, pdst)#endif /* vax */#ifdef mc68020#define FASTGETBITS(psrc, x, w, dst) \ __asm ("bfextu %3{%1:%2},%0" \ : "=d" (dst) : "di" (x), "di" (w), "o" (*(char *)(psrc)))#define getbits(psrc,x,w,dst) \{ \ FASTGETBITS(psrc, x, w, dst);\ dst = SHL(dst,(32-(w))); \}#define FASTPUTBITS(src, x, w, pdst) \ __asm ("bfins %3,%0{%1:%2}" \ : "=o" (*(char *)(pdst)) \ : "di" (x), "di" (w), "d" (src), "0" (*(char *) (pdst)))#define putbits(src, x, w, pdst) FASTPUTBITS(SHR((src),32-(w)), x, w, pdst)#endif /* mc68020 */#endif /* __GNUC__ *//* The following flag is used to override a bugfix for sun 3/60+CG4 machines, *//* We don't need to be careful about this unless we're dealing with sun3's * We will default its usage for those who do not know anything, but will * override its effect if the machine doesn't look like a sun3 */#if !defined(mc68020) || !defined(sun)#define NO_3_60_CG4#endif/* This is gross. We want to #define u_putbits as something which can be used * in the case of the 3/60+CG4, but if we use /bin/cc or are on another * machine type, we want nothing to do with u_putbits. What a hastle. Here * I used slo_putbits as something which either u_putbits or putbits could be * defined as. * * putbits gets it iff it is not already defined with FASTPUTBITS above. * u_putbits gets it if we have FASTPUTBITS (putbits) from above and have not * overridden the NO_3_60_CG4 flag. */#define slo_putbits(src, x, w, pdst) \{ \ register int n = (x)+(w)-PPW; \ \ if (n <= 0) \ { \ register PixelType tmpmask; \ maskpartialbits((x), (w), tmpmask); \ *(pdst) = (*(pdst) & ~tmpmask) | \ (SCRRIGHT(src, x) & tmpmask); \ } \ else \ { \ *(pdst) = (*(pdst) & endtab[x]) | (SCRRIGHT((src), x)); \ (pdst)[1] = ((pdst)[1] & starttab[n]) | \ (SCRLEFT(src, PPW-(x)) & endtab[n]); \ } \}#if defined(putbits) && !defined(NO_3_60_CG4)#define u_putbits(src, x, w, pdst) slo_putbits(src, x, w, pdst)#else#define u_putbits(src, x, w, pdst) putbits(src, x, w, pdst)#endif#if !defined(putbits) #define putbits(src, x, w, pdst) slo_putbits(src, x, w, pdst)#endif/* Now if we have not gotten any really good bitfield macros, try some * moderately fast macros. Alas, I don't know how to do asm instructions * without gcc. */#ifndef getbits#define getbits(psrc, x, w, dst) \{ \ dst = SCRLEFT(*(psrc), (x)); \ if ( ((x) + (w)) > PPW) \ dst |= (SCRRIGHT(*((psrc)+1), PPW-(x))); \}#endif/* We have to special-case putbitsrop because of 3/60+CG4 combos */#define u_putbitsrop(src, x, w, pdst, rop) \{\ register PixelType t1, t2; \ register int n = (x)+(w)-PPW; \ \ t1 = SCRRIGHT((src), (x)); \ DoRop(t2, rop, t1, *(pdst)); \ \ if (n <= 0) \ { \ register PixelType tmpmask; \ \ maskpartialbits((x), (w), tmpmask); \ *(pdst) = (*(pdst) & ~tmpmask) | (t2 & tmpmask); \ } \ else \ { \ int m = PPW-(x); \ *(pdst) = (*(pdst) & endtab[x]) | (t2 & starttab[x]); \ t1 = SCRLEFT((src), m); \ DoRop(t2, rop, t1, (pdst)[1]); \ (pdst)[1] = ((pdst)[1] & starttab[n]) | (t2 & endtab[n]); \ } \}/* If our getbits and putbits are FAST enough, * do this brute force, it's faster */#if defined(FASTPUTBITS) && defined(FASTGETBITS) && defined(NO_3_60_CG4)#if (BITMAP_BIT_ORDER == MSBFirst)#define putbitsrop(src, x, w, pdst, rop) \{ \ register PixelType _tmp, _tmp2; \ FASTGETBITS(pdst, x, w, _tmp); \ _tmp2 = SCRRIGHT(src, PPW-(w)); \ DoRop(_tmp, rop, _tmp2, _tmp) \ FASTPUTBITS(_tmp, x, w, pdst); \}#define putbitsrrop(src, x, w, pdst, rop) \{ \ register PixelType _tmp, _tmp2; \ \ FASTGETBITS(pdst, x, w, _tmp); \ _tmp2 = SCRRIGHT(src, PPW-(w)); \ _tmp= DoRRop(rop, _tmp2, _tmp); \ FASTPUTBITS(_tmp, x, w, pdst); \}#undef u_putbitsrop#else#define putbitsrop(src, x, w, pdst, rop) \{ \ register PixelType _tmp; \ FASTGETBITS(pdst, x, w, _tmp); \ DoRop(_tmp, rop, src, _tmp) \ FASTPUTBITS(_tmp, x, w, pdst); \}#define putbitsrrop(src, x, w, pdst, rop) \{ \ register PixelType _tmp; \ \ FASTGETBITS(pdst, x, w, _tmp); \ _tmp= DoRRop(rop, src, _tmp); \ FASTPUTBITS(_tmp, x, w, pdst); \}#undef u_putbitsrop#endif#endif#ifndef putbitsrop#define putbitsrop(src, x, w, pdst, rop) u_putbitsrop(src, x, w, pdst, rop)#endif #ifndef putbitsrrop#define putbitsrrop(src, x, w, pdst, rop) \{\ register PixelType t1, t2; \ register int n = (x)+(w)-PPW; \ \ t1 = SCRRIGHT((src), (x)); \ t2 = DoRRop(rop, t1, *(pdst)); \ \ if (n <= 0) \ { \ register PixelType tmpmask; \ \ maskpartialbits((x), (w), tmpmask); \ *(pdst) = (*(pdst) & ~tmpmask) | (t2 & tmpmask); \ } \ else \ { \ int m = PPW-(x); \ *(pdst) = (*(pdst) & endtab[x]) | (t2 & starttab[x]); \ t1 = SCRLEFT((src), m); \ t2 = DoRRop(rop, t1, (pdst)[1]); \ (pdst)[1] = ((pdst)[1] & starttab[n]) | (t2 & endtab[n]); \ } \}#endif#if GETLEFTBITS_ALIGNMENT == 1#define getleftbits(psrc, w, dst) dst = *((CARD32 *) psrc)#endif /* GETLEFTBITS_ALIGNMENT == 1 */#if GETLEFTBITS_ALIGNMENT == 2#define getleftbits(psrc, w, dst) \ { \ if ( ((int)(psrc)) & 0x01 ) \ getbits( ((CARD32 *)(((char *)(psrc))-1)), 8, (w), (dst) ); \ else \ getbits(psrc, 0, w, dst); \ }#endif /* GETLEFTBITS_ALIGNMENT == 2 */#if GETLEFTBITS_ALIGNMENT == 4#define getleftbits(psrc, w, dst) \ { \ int off, off_b; \ off_b = (off = ( ((int)(psrc)) & 0x03)) << 3; \ getbits( \ (CARD32 *)( ((char *)(psrc)) - off), \ (off_b), (w), (dst) \ ); \ }#endif /* GETLEFTBITS_ALIGNMENT == 4 */#define getshiftedleftbits(psrc, offset, w, dst) \ getleftbits((psrc), (w), (dst)); \ dst = SCRLEFT((dst), (offset));/* FASTGETBITS and FASTPUTBITS are not necessarily correct implementations of * getbits and putbits, but they work if used together. * * On a MSBFirst machine, a cpu bitfield extract instruction (like bfextu) * could normally assign its result to a long word register in the screen * right position. This saves canceling register shifts by not fighting the * natural cpu byte order. * * Unfortunately, these fail on a 3/60+CG4 and cannot be used unmodified. Sigh. */#if defined(FASTGETBITS) && defined(FASTPUTBITS)#ifdef NO_3_60_CG4#define u_FASTPUT(aa, bb, cc, dd) FASTPUTBITS(aa, bb, cc, dd)#else#define u_FASTPUT(aa, bb, cc, dd) u_putbits(SCRLEFT(aa, PPW-(cc)), bb, cc, dd)#endif#define getandputbits(psrc, srcbit, dstbit, width, pdst) \{ \ register PixelType _tmpbits; \ FASTGETBITS(psrc, srcbit, width, _tmpbits); \ u_FASTPUT(_tmpbits, dstbit, width, pdst); \}#define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \{ \ register PixelType _tmpsrc, _tmpdst; \ FASTGETBITS(pdst, dstbit, width, _tmpdst); \ FASTGETBITS(psrc, srcbit, width, _tmpsrc); \ DoRop(_tmpdst, rop, _tmpsrc, _tmpdst); \ u_FASTPUT(_tmpdst, dstbit, width, pdst); \}#define getandputrrop(psrc, srcbit, dstbit, width, pdst, rop) \{ \ register PixelType _tmpsrc, _tmpdst; \ FASTGETBITS(pdst, dstbit, width, _tmpdst); \ FASTGETBITS(psrc, srcbit, width, _tmpsrc); \ _tmpdst = DoRRop(rop, _tmpsrc, _tmpdst); \ u_FASTPUT(_tmpdst, dstbit, width, pdst); \}#define getandputbits0(psrc, srcbit, width, pdst) \ getandputbits(psrc, srcbit, 0, width, pdst)#define getandputrop0(psrc, srcbit, width, pdst, rop) \ getandputrop(psrc, srcbit, 0, width, pdst, rop)#define getandputrrop0(psrc, srcbit, width, pdst, rop) \ getandputrrop(psrc, srcbit, 0, width, pdst, rop)#else /* Slow poke *//* pairs of getbits/putbits happen frequently. Some of the code can * be shared or avoided in a few specific instances. It gets us a * small advantage, so we do it. The getandput...0 macros are the only ones * which speed things here. The others are here for compatibility w/the above * FAST ones */#define getandputbits(psrc, srcbit, dstbit, width, pdst) \{ \ register PixelType _tmpbits; \ getbits(psrc, srcbit, width, _tmpbits); \ putbits(_tmpbits, dstbit, width, pdst); \}#define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \{ \ register PixelType _tmpbits; \ getbits(psrc, srcbit, width, _tmpbits) \ putbitsrop(_tmpbits, dstbit, width, pdst, rop) \}#define getandputrrop(psrc, srcbit, dstbit, width, pdst, rop) \{ \ register PixelType _tmpbits; \ getbits(psrc, srcbit, width, _tmpbits) \ putbitsrrop(_tmpbits, dstbit, width, pdst, rop) \}#define getandputbits0(psrc, sbindex, width, pdst) \{ /* unroll the whole damn thing to see how it * behaves */ \ register int _flag = PPW - (sbindex); \ register PixelType _src; \ \ _src = SCRLEFT (*(psrc), (sbindex)); \ if ((width) > _flag) \ _src |= SCRRIGHT (*((psrc) + 1), _flag); \ \ *(pdst) = (*(pdst) & starttab[(width)]) | (_src & endtab[(width)]); \}#define getandputrop0(psrc, sbindex, width, pdst, rop) \{ \ register int _flag = PPW - (sbindex); \ register PixelType _src; \ \ _src = SCRLEFT (*(psrc), (sbindex)); \ if ((width) > _flag) \ _src |= SCRRIGHT (*((psrc) + 1), _flag); \ DoRop(_src, rop, _src, *(pdst)); \ \ *(pdst) = (*(pdst) & starttab[(width)]) | (_src & endtab[(width)]); \}#define getandputrrop0(psrc, sbindex, width, pdst, rop) \{ \ int _flag = PPW - (sbindex); \ register PixelType _src; \ \ _src = SCRLEFT (*(psrc), (sbindex)); \ if ((width) > _flag) \ _src |= SCRRIGHT (*((psrc) + 1), _flag); \ _src = DoRRop(rop, _src, *(pdst)); \ \ *(pdst) = (*(pdst) & starttab[(width)]) | (_src & endtab[(width)]); \}#endif /* FASTGETBITS && FASTPUTBITS */#endif /* MFB_CONSTS_ONLY */
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