ad.map.eqn

MAX125 AD 转换及转换后的数据读取

--A1L761 is IN~2048
A1L761_p0_out = A0 & A2 & A3 & A15 & !CS1_N & !A1 & !MAX_D8;
A1L761_p1_out = A0 & A2 & !A3 & A15 & !CS1_N & A1 & !DI16;
A1L761_p2_out = A0 & !A2 & A3 & A15 & !CS1_N & !A1 & !DI32;
A1L761_p3_out = !A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI40;
A1L761_p4_out = A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI48;
A1L761_or_out = A1L871 # A1L761_p0_out # A1L761_p1_out # A1L761_p2_out # A1L761_p3_out # A1L761_p4_out;
A1L761 = !(A1L761_or_out);


--A1L861 is IN~2055
A1L861_p0_out = A0 & A2 & A3 & A15 & !CS1_N & !A1 & !MAX_D10;
A1L861_p1_out = A0 & A2 & !A3 & A15 & !CS1_N & A1 & !DI18;
A1L861_p2_out = !A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI42;
A1L861_p3_out = A0 & !A2 & A3 & A15 & !CS1_N & !A1 & !DI34;
A1L861_p4_out = A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI50;
A1L861_or_out = A1L971 # A1L861_p0_out # A1L861_p1_out # A1L861_p2_out # A1L861_p3_out # A1L861_p4_out;
A1L861 = !(A1L861_or_out);


--A1L961 is IN~2062
A1L961_p0_out = A3 & A15 & !CS1_N & !A1 & A2 & A0 & !MAX_D13;
A1L961_p1_out = A3 & A15 & !CS1_N & !A1 & A2 & !A0 & !MAX_D5;
A1L961_p2_out = A3 & A15 & !CS1_N & A1 & !A2 & !A0 & !DI45;
A1L961_p3_out = A3 & A15 & !CS1_N & !A1 & !A2 & A0 & !DI37;
A1L961_p4_out = A3 & A15 & !CS1_N & A1 & !A2 & A0 & !DI53;
A1L961_or_out = A1L081 # A1L961_p0_out # A1L961_p1_out # A1L961_p2_out # A1L961_p3_out # A1L961_p4_out;
A1L961 = !(A1L961_or_out);


--A1L171 is IN~2072
A1L171_p0_out = A1L071 & A0 & A1 & A15 & !CS1_N & !A2 & A3 & !DI54;
A1L171_p2_out = A1L071 & !A0 & !A1 & A15 & !CS1_N & A2 & A3 & !MAX_D6;
A1L171_p3_out = A1L071 & !A0 & A1 & A15 & !CS1_N & !A2 & A3 & !DI46;
A1L171_p4_out = A1L071 & A0 & !A1 & A15 & !CS1_N & !A2 & A3 & !DI38;
A1L171_or_out = A1L171_p0_out # A1L171_p2_out # A1L171_p3_out # A1L171_p4_out;
A1L171 = A1L071 $ A1L171_or_out;


--A1L371 is IN~2084
A1L371_p0_out = A1L271 & A0 & A2 & A3 & A15 & !CS1_N & !A1 & !MAX_D9;
A1L371_p2_out = A1L271 & A0 & !A2 & A3 & A15 & !CS1_N & !A1 & !DI33;
A1L371_p3_out = A1L271 & !A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI41;
A1L371_p4_out = A1L271 & A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI49;
A1L371_or_out = A1L371_p0_out # A1L371_p2_out # A1L371_p3_out # A1L371_p4_out;
A1L371 = A1L271 $ A1L371_or_out;


--A1L571 is IN~2096
A1L571_p0_out = A1L471 & A0 & A2 & A3 & A15 & !CS1_N & !A1 & !MAX_D11;
A1L571_p2_out = A1L471 & A0 & !A2 & A3 & A15 & !CS1_N & !A1 & !DI35;
A1L571_p3_out = A1L471 & !A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI43;
A1L571_p4_out = A1L471 & A0 & !A2 & A3 & A15 & !CS1_N & A1 & !DI51;
A1L571_or_out = A1L571_p0_out # A1L571_p2_out # A1L571_p3_out # A1L571_p4_out;
A1L571 = A1L471 $ A1L571_or_out;


--A1L671 is IN~2104
A1L671_p0_out = A3 & A15 & !CS1_N & !A1 & A2 & A0 & !MAX_D12;
A1L671_p1_out = A3 & A15 & !CS1_N & !A1 & A2 & !A0 & !MAX_D4;
A1L671_p2_out = A3 & A15 & !CS1_N & A1 & !A2 & !A0 & !DI44;
A1L671_p3_out = A3 & A15 & !CS1_N & !A1 & !A2 & A0 & !DI36;
A1L671_p4_out = A3 & A15 & !CS1_N & A1 & !A2 & A0 & !DI52;
A1L671_or_out = A1L181 # A1L671_p0_out # A1L671_p1_out # A1L671_p2_out # A1L671_p3_out # A1L671_p4_out;
A1L671 = !(A1L671_or_out);


--A1L771 is IN~2111
A1L771_p0_out = A0 & A1 & A15 & !CS1_N & !A2 & A3 & !DI55;
A1L771_p1_out = !A0 & !A1 & A15 & !CS1_N & !A2 & A3 & !DI31;
A1L771_p2_out = !A0 & !A1 & A15 & !CS1_N & A2 & A3 & !MAX_D7;
A1L771_p3_out = !A0 & A1 & A15 & !CS1_N & !A2 & A3 & !DI47;
A1L771_p4_out = A0 & !A1 & A15 & !CS1_N & !A2 & A3 & !DI39;
A1L771_or_out = A1L281 # A1L771_p0_out # A1L771_p1_out # A1L771_p2_out # A1L771_p3_out # A1L771_p4_out;
A1L771 = !(A1L771_or_out);


--A1L431 is inst54~10
A1L431_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & A3;
A1L431_or_out = A1L431_p1_out;
A1L431 = !(A1L431_or_out);


--A1L641 is inst83~0
A1L641_p1_out = !A15 & !CS1_N;
A1L641_or_out = A1L641_p1_out;
A1L641 = !(A1L641_or_out);


--A1L41 is CPU_OE~9
A1L41_or_out = CPU_OE;
A1L41 = A1L41_or_out;


--A1L61 is CPU_WE~2
A1L61_or_out = CPU_WE;
A1L61 = A1L61_or_out;


--A1L041 is inst67~10
A1L041_p1_out = A15 & !CS1_N & A4;
A1L041_or_out = A1L041_p1_out;
A1L041 = !(A1L041_or_out);


--A1L141 is inst68~10
A1L141_p1_out = A15 & !CS1_N & A5;
A1L141_or_out = A1L141_p1_out;
A1L141 = !(A1L141_or_out);


--A1L531 is inst55~8
A1L531_p1_out = A15 & !CS1_N & !A0 & !A1 & A2 & A3 & !CPU_OE;
A1L531_or_out = A1L531_p1_out;
A1L531 = !(A1L531_or_out);


--A1L851 is inst284~33
A1L851_p1_out = A1L551 & A1L651 & A1L751;
A1L851_or_out = A1L851_p1_out;
A1L851 = A1L851_or_out;


--A1L261 is inst286~33
A1L261_p1_out = A1L951 & A1L061 & A1L161;
A1L261_or_out = A1L261_p1_out;
A1L261 = A1L261_or_out;


--A1L661 is inst288~33
A1L661_p1_out = A1L361 & A1L461 & A1L561;
A1L661_or_out = A1L661_p1_out;
A1L661 = A1L661_or_out;


--B1L5 is 74373:inst5|16~10
B1L5_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L741;
B1L5_p2_out = B1L5 & A1L331;
B1L5_p3_out = B1L5 & A1L741;
B1L5_or_out = B1L5_p1_out # B1L5_p2_out # B1L5_p3_out;
B1L5 = B1L5_or_out;


--B1L6 is 74373:inst5|17~10
B1L6_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L841;
B1L6_p2_out = B1L6 & A1L331;
B1L6_p3_out = B1L6 & A1L841;
B1L6_or_out = B1L6_p1_out # B1L6_p2_out # B1L6_p3_out;
B1L6 = B1L6_or_out;


--B1L7 is 74373:inst5|18~10
B1L7_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L941;
B1L7_p2_out = B1L7 & A1L331;
B1L7_p3_out = B1L7 & A1L941;
B1L7_or_out = B1L7_p1_out # B1L7_p2_out # B1L7_p3_out;
B1L7 = B1L7_or_out;


--B1L8 is 74373:inst5|19~10
B1L8_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L051;
B1L8_p2_out = B1L8 & A1L331;
B1L8_p3_out = B1L8 & A1L051;
B1L8_or_out = B1L8_p1_out # B1L8_p2_out # B1L8_p3_out;
B1L8 = B1L8_or_out;


--B2L5 is 74373:inst6|16~10
B2L5_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L741;
B2L5_p2_out = B2L5 & A1L631;
B2L5_p3_out = B2L5 & A1L741;
B2L5_or_out = B2L5_p1_out # B2L5_p2_out # B2L5_p3_out;
B2L5 = B2L5_or_out;


--B2L6 is 74373:inst6|17~10
B2L6_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L841;
B2L6_p2_out = B2L6 & A1L631;
B2L6_p3_out = B2L6 & A1L841;
B2L6_or_out = B2L6_p1_out # B2L6_p2_out # B2L6_p3_out;
B2L6 = B2L6_or_out;


--B2L7 is 74373:inst6|18~10
B2L7_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L941;
B2L7_p2_out = B2L7 & A1L631;
B2L7_p3_out = B2L7 & A1L941;
B2L7_or_out = B2L7_p1_out # B2L7_p2_out # B2L7_p3_out;
B2L7 = B2L7_or_out;


--B2L8 is 74373:inst6|19~10
B2L8_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L051;
B2L8_p2_out = B2L8 & A1L631;
B2L8_p3_out = B2L8 & A1L051;
B2L8_or_out = B2L8_p1_out # B2L8_p2_out # B2L8_p3_out;
B2L8 = B2L8_or_out;


--B3L5 is 74373:inst7|16~10
B3L5_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L741;
B3L5_p2_out = B3L5 & A1L731;
B3L5_p3_out = B3L5 & A1L741;
B3L5_or_out = B3L5_p1_out # B3L5_p2_out # B3L5_p3_out;
B3L5 = B3L5_or_out;


--B3L6 is 74373:inst7|17~10
B3L6_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L841;
B3L6_p2_out = B3L6 & A1L731;
B3L6_p3_out = B3L6 & A1L841;
B3L6_or_out = B3L6_p1_out # B3L6_p2_out # B3L6_p3_out;
B3L6 = B3L6_or_out;


--B3L7 is 74373:inst7|18~10
B3L7_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L941;
B3L7_p2_out = B3L7 & A1L731;
B3L7_p3_out = B3L7 & A1L941;
B3L7_or_out = B3L7_p1_out # B3L7_p2_out # B3L7_p3_out;
B3L7 = B3L7_or_out;


--B3L8 is 74373:inst7|19~10
B3L8_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L051;
B3L8_p2_out = B3L8 & A1L731;
B3L8_p3_out = B3L8 & A1L051;
B3L8_or_out = B3L8_p1_out # B3L8_p2_out # B3L8_p3_out;
B3L8 = B3L8_or_out;


--B4L5 is 74373:inst8|16~10
B4L5_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L741;
B4L5_p2_out = B4L5 & A1L831;
B4L5_p3_out = B4L5 & A1L741;
B4L5_or_out = B4L5_p1_out # B4L5_p2_out # B4L5_p3_out;
B4L5 = B4L5_or_out;


--B4L6 is 74373:inst8|17~10
B4L6_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L841;
B4L6_p2_out = B4L6 & A1L831;
B4L6_p3_out = B4L6 & A1L841;
B4L6_or_out = B4L6_p1_out # B4L6_p2_out # B4L6_p3_out;
B4L6 = B4L6_or_out;


--B4L7 is 74373:inst8|18~10
B4L7_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L941;
B4L7_p2_out = B4L7 & A1L831;
B4L7_p3_out = B4L7 & A1L941;
B4L7_or_out = B4L7_p1_out # B4L7_p2_out # B4L7_p3_out;
B4L7 = B4L7_or_out;


--B4L8 is 74373:inst8|19~10
B4L8_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L051;
B4L8_p2_out = B4L8 & A1L831;
B4L8_p3_out = B4L8 & A1L051;
B4L8_or_out = B4L8_p1_out # B4L8_p2_out # B4L8_p3_out;
B4L8 = B4L8_or_out;


--B5L5 is 74373:inst9|16~10
B5L5_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L741;
B5L5_p2_out = B5L5 & A1L931;
B5L5_p3_out = B5L5 & A1L741;
B5L5_or_out = B5L5_p1_out # B5L5_p2_out # B5L5_p3_out;
B5L5 = B5L5_or_out;


--B5L6 is 74373:inst9|17~10
B5L6_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L841;
B5L6_p2_out = B5L6 & A1L931;
B5L6_p3_out = B5L6 & A1L841;
B5L6_or_out = B5L6_p1_out # B5L6_p2_out # B5L6_p3_out;
B5L6 = B5L6_or_out;


--B5L7 is 74373:inst9|18~10
B5L7_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L941;
B5L7_p2_out = B5L7 & A1L931;
B5L7_p3_out = B5L7 & A1L941;
B5L7_or_out = B5L7_p1_out # B5L7_p2_out # B5L7_p3_out;
B5L7 = B5L7_or_out;


--B5L8 is 74373:inst9|19~10
B5L8_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L051;
B5L8_p2_out = B5L8 & A1L931;
B5L8_p3_out = B5L8 & A1L051;
B5L8_or_out = B5L8_p1_out # B5L8_p2_out # B5L8_p3_out;
B5L8 = B5L8_or_out;


--A1L451 is inst282~37
A1L451_p1_out = A1L151 & A1L251 & A1L351;
A1L451_or_out = A1L451_p1_out;
A1L451 = A1L451_or_out;


--B1L2 is 74373:inst5|13~10
B1L2_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L551 & A1L651 & A1L751;
B1L2_p2_out = B1L2 & A1L331;
B1L2_p3_out = B1L2 & A1L551 & A1L651 & A1L751;
B1L2_or_out = B1L2_p1_out # B1L2_p2_out # B1L2_p3_out;
B1L2 = B1L2_or_out;


--B1L3 is 74373:inst5|14~10
B1L3_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L951 & A1L061 & A1L161;
B1L3_p2_out = B1L3 & A1L331;
B1L3_p3_out = B1L3 & A1L951 & A1L061 & A1L161;
B1L3_or_out = B1L3_p1_out # B1L3_p2_out # B1L3_p3_out;
B1L3 = B1L3_or_out;


--B1L4 is 74373:inst5|15~10
B1L4_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L361 & A1L461 & A1L561;
B1L4_p2_out = B1L4 & A1L331;
B1L4_p3_out = B1L4 & A1L361 & A1L461 & A1L561;
B1L4_or_out = B1L4_p1_out # B1L4_p2_out # B1L4_p3_out;
B1L4 = B1L4_or_out;


--B2L2 is 74373:inst6|13~10
B2L2_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L551 & A1L651 & A1L751;
B2L2_p2_out = B2L2 & A1L631;
B2L2_p3_out = B2L2 & A1L551 & A1L651 & A1L751;
B2L2_or_out = B2L2_p1_out # B2L2_p2_out # B2L2_p3_out;
B2L2 = B2L2_or_out;


--B2L3 is 74373:inst6|14~10
B2L3_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L951 & A1L061 & A1L161;
B2L3_p2_out = B2L3 & A1L631;
B2L3_p3_out = B2L3 & A1L951 & A1L061 & A1L161;
B2L3_or_out = B2L3_p1_out # B2L3_p2_out # B2L3_p3_out;
B2L3 = B2L3_or_out;


--B2L4 is 74373:inst6|15~10
B2L4_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L361 & A1L461 & A1L561;
B2L4_p2_out = B2L4 & A1L631;
B2L4_p3_out = B2L4 & A1L361 & A1L461 & A1L561;
B2L4_or_out = B2L4_p1_out # B2L4_p2_out # B2L4_p3_out;
B2L4 = B2L4_or_out;


--B3L2 is 74373:inst7|13~10
B3L2_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L551 & A1L651 & A1L751;
B3L2_p2_out = B3L2 & A1L731;
B3L2_p3_out = B3L2 & A1L551 & A1L651 & A1L751;
B3L2_or_out = B3L2_p1_out # B3L2_p2_out # B3L2_p3_out;
B3L2 = B3L2_or_out;


--B3L3 is 74373:inst7|14~10
B3L3_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L951 & A1L061 & A1L161;
B3L3_p2_out = B3L3 & A1L731;
B3L3_p3_out = B3L3 & A1L951 & A1L061 & A1L161;
B3L3_or_out = B3L3_p1_out # B3L3_p2_out # B3L3_p3_out;
B3L3 = B3L3_or_out;


--B3L4 is 74373:inst7|15~10
B3L4_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L361 & A1L461 & A1L561;
B3L4_p2_out = B3L4 & A1L731;
B3L4_p3_out = B3L4 & A1L361 & A1L461 & A1L561;
B3L4_or_out = B3L4_p1_out # B3L4_p2_out # B3L4_p3_out;
B3L4 = B3L4_or_out;


--B4L2 is 74373:inst8|13~10
B4L2_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L551 & A1L651 & A1L751;
B4L2_p2_out = B4L2 & A1L831;
B4L2_p3_out = B4L2 & A1L551 & A1L651 & A1L751;
B4L2_or_out = B4L2_p1_out # B4L2_p2_out # B4L2_p3_out;
B4L2 = B4L2_or_out;


--B4L3 is 74373:inst8|14~10
B4L3_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L951 & A1L061 & A1L161;
B4L3_p2_out = B4L3 & A1L831;
B4L3_p3_out = B4L3 & A1L951 & A1L061 & A1L161;
B4L3_or_out = B4L3_p1_out # B4L3_p2_out # B4L3_p3_out;
B4L3 = B4L3_or_out;


--B4L4 is 74373:inst8|15~10
B4L4_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L361 & A1L461 & A1L561;
B4L4_p2_out = B4L4 & A1L831;
B4L4_p3_out = B4L4 & A1L361 & A1L461 & A1L561;
B4L4_or_out = B4L4_p1_out # B4L4_p2_out # B4L4_p3_out;
B4L4 = B4L4_or_out;


--B5L2 is 74373:inst9|13~10
B5L2_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L551 & A1L651 & A1L751;
B5L2_p2_out = B5L2 & A1L931;
B5L2_p3_out = B5L2 & A1L551 & A1L651 & A1L751;
B5L2_or_out = B5L2_p1_out # B5L2_p2_out # B5L2_p3_out;
B5L2 = B5L2_or_out;


--B5L3 is 74373:inst9|14~10
B5L3_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L951 & A1L061 & A1L161;
B5L3_p2_out = B5L3 & A1L931;
B5L3_p3_out = B5L3 & A1L951 & A1L061 & A1L161;
B5L3_or_out = B5L3_p1_out # B5L3_p2_out # B5L3_p3_out;
B5L3 = B5L3_or_out;


--B5L4 is 74373:inst9|15~10
B5L4_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L361 & A1L461 & A1L561;
B5L4_p2_out = B5L4 & A1L931;
B5L4_p3_out = B5L4 & A1L361 & A1L461 & A1L561;
B5L4_or_out = B5L4_p1_out # B5L4_p2_out # B5L4_p3_out;
B5L4 = B5L4_or_out;


--A1L241 is inst77~10
A1L241_p1_out = !A0 & !CPU_WE & A2 & A3 & A15 & !CS1_N & A1 & A1L151 & A1L251 & A1L351;
A1L241_p2_out = !A1L241 & A1L541;
A1L241_p3_out = !A1L241 & A1L151 & A1L251 & A1L351;
A1L241_or_out = A1L241_p1_out # A1L241_p2_out # A1L241_p3_out;
A1L241 = !(A1L241_or_out);


--A1L341 is inst78~10
A1L341_p1_out = A0 & !CPU_WE & A2 & A3 & A15 & !CS1_N & A1 & A1L151 & A1L251 & A1L351;
A1L341_p2_out = A1L341 & A1L441;
A1L341_p3_out = A1L341 & A1L151 & A1L251 & A1L351;
A1L341_or_out = A1L341_p1_out # A1L341_p2_out # A1L341_p3_out;
A1L341 = A1L341_or_out;


--B1L1 is 74373:inst5|12~10
B1L1_p1_out = !A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L151 & A1L251 & A1L351;
B1L1_p2_out = B1L1 & A1L331;
B1L1_p3_out = B1L1 & A1L151 & A1L251 & A1L351;
B1L1_or_out = B1L1_p1_out # B1L1_p2_out # B1L1_p3_out;
B1L1 = B1L1_or_out;


--B2L1 is 74373:inst6|12~10
B2L1_p1_out = A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L151 & A1L251 & A1L351;
B2L1_p2_out = B2L1 & A1L631;
B2L1_p3_out = B2L1 & A1L151 & A1L251 & A1L351;
B2L1_or_out = B2L1_p1_out # B2L1_p2_out # B2L1_p3_out;
B2L1 = B2L1_or_out;


--B4L1 is 74373:inst8|12~10
B4L1_p1_out = A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L151 & A1L251 & A1L351;
B4L1_p2_out = B4L1 & A1L831;
B4L1_p3_out = B4L1 & A1L151 & A1L251 & A1L351;
B4L1_or_out = B4L1_p1_out # B4L1_p2_out # B4L1_p3_out;
B4L1 = B4L1_or_out;


--B5L1 is 74373:inst9|12~10
B5L1_p1_out = !CPU_WE & A15 & !CS1_N & !A0 & !A1 & A2 & !A3 & A1L151 & A1L251 & A1L351;
B5L1_p2_out = B5L1 & A1L931;
B5L1_p3_out = B5L1 & A1L151 & A1L251 & A1L351;
B5L1_or_out = B5L1_p1_out # B5L1_p2_out # B5L1_p3_out;
B5L1 = B5L1_or_out;


--B3L1 is 74373:inst7|12~10
B3L1_p1_out = !A0 & A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3 & A1L151 & A1L251 & A1L351;
B3L1_p2_out = B3L1 & A1L731;
B3L1_p3_out = B3L1 & A1L151 & A1L251 & A1L351;
B3L1_or_out = B3L1_p1_out # B3L1_p2_out # B3L1_p3_out;
B3L1 = B3L1_or_out;


--A1L871 is IN~2113
A1L871_p1_out = !A0 & !A2 & A3 & A15 & !CS1_N & !A1 & !DI24;
A1L871_p2_out = !A0 & A2 & A3 & A15 & !CS1_N & !A1 & !A1L581;
A1L871_p3_out = !A0 & A2 & !A3 & A15 & !CS1_N & A1 & !DI8;
A1L871_p4_out = A0 & A2 & !A3 & A15 & !CS1_N & !A1 & !DI0;
A1L871 = A1L871_p1_out # A1L871_p2_out # A1L871_p3_out # A1L871_p4_out;


--A1L971 is IN~2118
A1L971_p1_out = !A0 & !A2 & A3 & A15 & !CS1_N & !A1 & !DI26;
A1L971_p2_out = !A0 & A2 & A3 & A15 & !CS1_N & !A1 & !A1L981;
A1L971_p3_out = !A0 & A2 & !A3 & A15 & !CS1_N & A1 & !DI10;
A1L971_p4_out = A0 & A2 & !A3 & A15 & !CS1_N & !A1 & !DI2;
A1L971 = A1L971_p1_out # A1L971_p2_out # A1L971_p3_out # A1L971_p4_out;


--A1L081 is IN~2123
A1L081_p1_out = !A3 & A15 & !CS1_N & !A1 & A2 & A0 & !DI5;
A1L081_p2_out = !A3 & A15 & !CS1_N & A1 & A2 & A0 & !DI21;
A1L081_p3_out = !A3 & A15 & !CS1_N & A1 & A2 & !A0 & !DI13;
A1L081_p4_out = A3 & A15 & !CS1_N & !A1 & !A2 & !A0 & !DI29;
A1L081 = A1L081_p1_out # A1L081_p2_out # A1L081_p3_out # A1L081_p4_out;


--A1L181 is IN~2128
A1L181_p1_out = !A3 & A15 & !CS1_N & !A1 & A2 & A0 & !DI4;
A1L181_p2_out = !A3 & A15 & !CS1_N & A1 & A2 & A0 & !DI20;
A1L181_p3_out = !A3 & A15 & !CS1_N & A1 & A2 & !A0 & !DI12;
A1L181_p4_out = A3 & A15 & !CS1_N & !A1 & !A2 & !A0 & !DI28;
A1L181 = A1L181_p1_out # A1L181_p2_out # A1L181_p3_out # A1L181_p4_out;


--A1L281 is IN~2133
A1L281_p1_out = !DI7 & A0 & !A1 & A15 & !CS1_N & A2 & !A3;
A1L281_p2_out = A0 & A1 & A15 & !CS1_N & A2 & !A3 & !DI23;
A1L281_p3_out = !A0 & A1 & A15 & !CS1_N & A2 & !A3 & !DI15;
A1L281 = A1L281_p1_out # A1L281_p2_out # A1L281_p3_out;


--~VCC~0 is ~VCC~0
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~GND~0 is ~GND~0
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--A1L331 is inst44~21sexp
A1L331 = EXP(!A0 & !A1 & !CPU_WE & A15 & !CS1_N & !A2 & !A3);