host_interface_vhdl.prj

Xilinx XC4VSX35为核心的 XtremeDSP Development Kit-IV 开发板的例程

vhdl work "E:\host_interface_basic\source\fifocnt4.vhd"
vhdl work "E:\host_interface_basic\source\ringregosc.vhd"
vhdl work "E:\host_interface_basic\source\fwfrff_32.vhd"
vhdl work "E:\host_interface_basic\source\counter.vhd"
vhdl work "E:\host_interface_basic\source\if_main.vhd"
vhdl work "E:\host_interface_basic\source\dma_ctrl.vhd"
vhdl work "E:\host_interface_basic\source\dcm_standby.vhd"
vhdl work "E:\host_interface_basic\source\syncfifo.vhd"
vhdl work "E:\host_interface_basic\source\sv_iface.vhd"
vhdl work "E:\download_material\virtex4_board\XTremeDSP_developmentIV\Examples\host_interface_basic\ise\host_interface\dimeclk_module_mod.vhd"
vhdl work "E:\host_interface_basic\source\host_interface.vhd"