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📄 init_target.c

📁 Bycore是一个嵌入式操作系统内核。Bycore包括内存管理、任务管理、中断管理、任务互斥、同步与通信管理等功能。Bycore全部由C语言完成
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/** *  init_target.c - Initialize running environments for bycore. * *  All rights reserved. *  Copyright (C) 2008 ZhangHu *  E-MAIL: anmnmnly@gmail.com * *  This program is free software: you can redistribute it and/or modify *  it under the terms of the GNU General Public License as published by *  the Free Software Foundation, either version 3 of the License, or *  (at your option) any later version. * *  This program is distributed in the hope that it will be useful, *  but WITHOUT ANY WARRANTY; without even the implied warranty of *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the *  GNU General Public License for more details. * *  You should have received a copy of the GNU General Public License *  along with this program.  If not, see <http://www.gnu.org/licenses/>. */#include "regdef.h"#include "init_target.h"#if 0  /* Set memory control registers	*/int static SMRDATA[13] = {0x11110090,    ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)),    ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)),    ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)),    ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)),    ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)),    ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)),    ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)),    ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)),    ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT),    0x16,0x20,0x20};#endif/** * init_target - */void init_target(void){  /* disable watch dog */    rWTCON = 0x0;    /* disable all interrupt */    rINTMSK = 0x07FFFFFF;    rINTCON = 0x05;   /* disable irq interrupt, and interrupt mode is IRQ */    rINTMOD = 0x0;    /* all interrupts is IRQ mode */    /* Set clock control registers	*/    rLOCKTIME = 0x320;  /* count = t_lock * Fin (t_lock=200us, Fin=4MHz) = 800 */    rPLLCON = (M_DIV<<12)+(P_DIV<<4)+S_DIV; /* Fin=10MHz,Fout=40MHz */    rCLKCON = 0x7ff8;   /* enable all unit block CLK */    /* initialize memory control register */#if 0    int *p,i;    p = (int*)0x01C80000;    for(i=0;i<=12;i++) {        *p++ = SMRDATA[i];    }#endif}

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