usbbus.tan.qmsg

usb 源程序 但愿对usb开发头疼的朋友有帮助

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Feb 15 15:39:00 2006 " "Info: Processing started: Wed Feb 15 15:39:00 2006" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --import_settings_files=off --export_settings_files=off usbbus -c usbbus " "Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off usbbus -c usbbus" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "RD pa\[0\] 16.600 ns Longest " "Info: Longest tpd from source pin RD to destination pin pa\[0\] is 16.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 1.200 ns RD 1 PIN Pin_61 2 " "Info: 1: + IC(0.000 ns) + CELL(1.200 ns) = 1.200 ns; Loc. = Pin_61; Fanout = 2; PIN Node = 'RD'" {  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "" { RD } "NODE_NAME" } } } { "F:/test/test/usbbus/usbbus.bdf" "" "" { Schematic "F:/test/test/usbbus/usbbus.bdf" { { 144 40 208 160 "RD" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.200 ns) + CELL(4.000 ns) 8.400 ns RD~3 2 COMB LC161 8 " "Info: 2: + IC(3.200 ns) + CELL(4.000 ns) = 8.400 ns; Loc. = LC161; Fanout = 8; COMB Node = 'RD~3'" {  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "7.200 ns" { RD RD~3 } "NODE_NAME" } } } { "F:/test/test/usbbus/usbbus.bdf" "" "" { Schematic "F:/test/test/usbbus/usbbus.bdf" { { 144 40 208 160 "RD" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.200 ns) + CELL(5.000 ns) 16.600 ns pa\[0\] 3 PIN Pin_32 0 " "Info: 3: + IC(3.200 ns) + CELL(5.000 ns) = 16.600 ns; Loc. = Pin_32; Fanout = 0; PIN Node = 'pa\[0\]'" {  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "8.200 ns" { RD~3 pa[0] } "NODE_NAME" } } } { "F:/test/test/usbbus/usbbus.bdf" "" "" { Schematic "F:/test/test/usbbus/usbbus.bdf" { { 400 648 824 416 "pa\[7..0\]" "" } { 112 608 704 128 "PA\[3..0\]" "" } { 128 608 704 144 "PA\[7..4\]" "" } { 264 616 712 280 "PA\[7..4\]" "" } { 312 616 712 328 "PA\[3..0\]" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "10.200 ns 61.45 % " "Info: Total cell delay = 10.200 ns ( 61.45 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.400 ns 38.55 % " "Info: Total interconnect delay = 6.400 ns ( 38.55 % )" {  } {  } 0}  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "16.600 ns" { RD RD~3 pa[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "WR D\[7\] 9.400 ns Shortest " "Info: Shortest tpd from source pin WR to destination pin D\[7\] is 9.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 1.200 ns WR 1 PIN Pin_60 9 " "Info: 1: + IC(0.000 ns) + CELL(1.200 ns) = 1.200 ns; Loc. = Pin_60; Fanout = 9; PIN Node = 'WR'" {  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "" { WR } "NODE_NAME" } } } { "F:/test/test/usbbus/usbbus.bdf" "" "" { Schematic "F:/test/test/usbbus/usbbus.bdf" { { 104 40 208 120 "WR" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.200 ns) + CELL(5.000 ns) 9.400 ns D\[7\] 2 PIN Pin_70 0 " "Info: 2: + IC(3.200 ns) + CELL(5.000 ns) = 9.400 ns; Loc. = Pin_70; Fanout = 0; PIN Node = 'D\[7\]'" {  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "8.200 ns" { WR D[7] } "NODE_NAME" } } } { "F:/test/test/usbbus/usbbus.bdf" "" "" { Schematic "F:/test/test/usbbus/usbbus.bdf" { { 560 656 832 576 "D\[7..0\]" "" } { 96 840 928 112 "D\[3..0\]" "" } { 144 840 936 160 "D\[7..4\]" "" } { 280 848 936 296 "D\[7..4\]" "" } { 296 848 936 312 "D\[3..0\]" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.200 ns 65.96 % " "Info: Total cell delay = 6.200 ns ( 65.96 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.200 ns 34.04 % " "Info: Total interconnect delay = 3.200 ns ( 34.04 % )" {  } {  } 0}  } { { "F:/test/test/usbbus/db/usbbus_cmp.qrpt" "" "" { Report "F:/test/test/usbbus/db/usbbus_cmp.qrpt" Compiler "usbbus" "UNKNOWN" "V1" "F:/test/test/usbbus/db/usbbus.quartus_db" { Floorplan "" "" "9.400 ns" { WR D[7] } "NODE_NAME" } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Feb 15 15:39:00 2006 " "Info: Processing ended: Wed Feb 15 15:39:00 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0}  } {  } 0}