📄 usbbus.pin
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-- Copyright (C) 1991-2004 Altera Corporation
-- Any megafunction design, and related netlist (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only
-- to program PLD devices (but not masked PLD devices) from Altera. Any
-- other use of such megafunction design, netlist, support information,
-- device programming or simulation file, or any other related documentation
-- or information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to the
-- intellectual property, including patents, copyrights, trademarks, trade
-- secrets, or maskworks, embodied in any such megafunction design, netlist,
-- support information, device programming or simulation file, or any other
-- related documentation or information provided by Altera or a megafunction
-- partner, remains with Altera, the megafunction partner, or their respective
-- licensors. No other licenses, including any licenses needed under any third
-- party's intellectual property, are provided herein.
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
-- NC : No Connect. This pin has no internal connection to the device.
-- VCCINT : Dedicated power pin, which MUST be connected to VCC (3.3V).
-- VCCIO : Dedicated power pin, which MUST be connected to VCC (Refer to
-- the table below for voltage).
-- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
-- It can also be used to report unused dedicated pins. The connection
-- on the board for unused dedicated pins depends on whether this will
-- be used in a future design. One example is device migration. When
-- using device migration, refer to the device pin-tables. If it is a
-- GND pin in the pin table or if it will not be used in a future design
-- for another purpose the it MUST be connected to GND. If it is an unused
-- dedicated pin, then it can be connected to a valid signal on the board
-- (low, high, or toggling) if that signal is required for a different
-- revision of the design.
-- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins.
-- This pin should be connected to GND. It may also be connected to a
-- valid signal on the board (low, high, or toggling) if that signal
-- is required for a different revision of the design.
-- GND* : Unused I/O pin. This pin can either be left unconnected or
-- connected to GND. Connecting this pin to GND will improve the
-- device's immunity to noise.
-- NON_MIGRATABLE: This pin cannot be migrated.
---------------------------------------------------------------------------------
Quartus II Version 4.0 Build 190 1/28/2004 SJ Full Version
CHIP "usbbus" ASSIGNED TO AN: EPM3256ATC144-10
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
-------------------------------------------------------------------------------------------------------------
ALE : 1 : input : LVTTL : : : Y
PSEN : 2 : input : LVTTL : : : Y
GND : 3 : gnd : : : :
TDI : 4 : input : LVTTL : : : N
K3 : 5 : input : LVTTL : : : Y
LED0 : 6 : output : LVTTL : : : Y
LED1 : 7 : output : LVTTL : : : Y
LED2 : 8 : output : LVTTL : : : Y
LED3 : 9 : output : LVTTL : : : Y
GND* : 10 : : : : :
PC1 : 11 : input : LVTTL : : : Y
PC0 : 12 : input : LVTTL : : : Y
GND : 13 : gnd : : : :
PC2 : 14 : input : LVTTL : : : Y
PC3 : 15 : input : LVTTL : : : Y
PC4 : 16 : output : LVTTL : : : Y
GND : 17 : gnd : : : :
PC5 : 18 : output : LVTTL : : : Y
GND* : 19 : : : : :
TMS : 20 : input : LVTTL : : : N
pa[7] : 21 : bidir : LVTTL : : : Y
pa[6] : 22 : bidir : LVTTL : : : Y
pa[5] : 23 : bidir : LVTTL : : : Y
VCCIO : 24 : power : : 3.3V : :
pa[4] : 25 : bidir : LVTTL : : : Y
GND : 26 : gnd : : : :
PC6 : 27 : output : LVTTL : : : Y
PC7 : 28 : output : LVTTL : : : Y
pa[3] : 29 : bidir : LVTTL : : : Y
pa[2] : 30 : bidir : LVTTL : : : Y
pa[1] : 31 : bidir : LVTTL : : : Y
pa[0] : 32 : bidir : LVTTL : : : Y
GND : 33 : gnd : : : :
EA : 34 : input : LVTTL : : : Y
GND* : 35 : : : : :
GND* : 36 : : : : :
PB[7] : 37 : output : LVTTL : : : Y
PD2 : 38 : output : LVTTL : : : Y
PB[6] : 39 : output : LVTTL : : : Y
PB[5] : 40 : output : LVTTL : : : Y
PB[0] : 41 : output : LVTTL : : : Y
GND* : 42 : : : : :
GND* : 43 : : : : :
PB[1] : 44 : output : LVTTL : : : Y
PB[2] : 45 : output : LVTTL : : : Y
GND* : 46 : : : : :
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