📄 hardware.lst
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00008DAD 09 23 40 00 r1 -= 0x40;
00008DAF 19 D3 17 70 [P_DAC1] = r1;
00008DB1 4A 4E jnz L_RD_Loop;
L_RD_End:
00008DB2 90 90 pop r1,r2 from [sp];
00008DB3 90 9A retf;
.ENDP
///////////////////////////////////////
_SP_RampUpDAC2: .PROC
F_SP_RampUpDAC2:
00008DB4 90 D4 push r1,r2 to [sp];
00008DB5 11 93 16 70 r1=[P_DAC2];
00008DB7 09 B3 C0 FF r1 &= ~0x003f;
00008DB9 09 43 00 80 cmp r1,0x8000
00008DBB 0E 0E jb L_RU_NormalUp_;
00008DBC 5D 5E je L_RU_End;
L_RU_DownLoop_:
00008DBD 40 F0 EA 8D call F_Delay;
00008DBF 41 94 r2 = 0x0001;
00008DC0 1A D5 12 70 [P_Watchdog_Clear] = r2;
00008DC2 09 23 40 00 r1 -= 0x40;
00008DC4 19 D3 16 70 [P_DAC2] = r1;
00008DC6 09 43 00 80 cmp r1,0x8000;
00008DC8 4C 4E jne L_RU_DownLoop_;
L_RD_DownEnd_:
00008DC9 0C EE jmp L_RU_End_;
L_RU_NormalUp_:
L_RU_Loop_:
00008DCA 40 F0 EA 8D call F_Delay;
00008DCC 41 94 r2 = 0x0001;
00008DCD 1A D5 12 70 [P_Watchdog_Clear] = r2;
00008DCF 09 03 40 00 r1 += 0x40;
00008DD1 19 D3 16 70 [P_DAC2] = r1;
00008DD3 09 43 00 80 cmp r1, 0x8000;
00008DD5 4C 4E jne L_RU_Loop_;
L_RU_End_:
00008DD6 90 90 pop r1,r2 from [sp];
00008DD7 90 9A retf;
.ENDP
///////////////////////////////////////
_SP_RampDnDAC2: .PROC
F_SP_RampDnDAC2:
//int off;
00008DD8 90 D4 push r1,r2 to [sp];
00008DD9 11 93 16 70 r1 = [P_DAC2];
00008DDB 09 B3 C0 FF r1 &= ~0x003F;
00008DDD 0A 5E jz L_RD_End_;
L_RD_Loop_:
00008DDE 40 F0 EA 8D call F_Delay;
00008DE0 41 94 r2 = 0x0001;
00008DE1 1A D5 12 70 [P_Watchdog_Clear] = r2;
00008DE3 09 23 40 00 r1 -= 0x40;
00008DE5 19 D3 16 70 [P_DAC2] = r1;
00008DE7 4A 4E jnz L_RD_Loop_;
L_RD_End_:
00008DE8 90 90 pop r1,r2 from [sp];
00008DE9 90 9A retf;
.ENDP
////////////////////////////////////////
F_Delay:
00008DEA 88 D2 push r1 to [sp];
00008DEB 48 92 r1 = 8;
L_D_Loop:
00008DEC 41 22 r1 -= 1;
00008DED 42 4E jnz L_D_Loop;
00008DEE 88 90 pop r1 from [sp];
00008DEF 90 9A retf;
///////////////////////////////////////////
// Function: Initial Queue
// Destory: R1,R2
///////////////////////////////////////////
F_SP_InitQueue:
00008DF0 09 93 FB 02 R1 = R_Queue;
00008DF2 40 94 R2 = 0;
L_ClearQueueLoop:
00008DF3 D1 D4 [R1++] = R2;
00008DF4 09 43 2D 03 cmp R1, R_Queue+C_QueueSize;
00008DF6 44 4E jne L_ClearQueueLoop;
00008DF7 40 92 R1 = 0;
00008DF8 19 D3 2D 03 [R_ReadIndex] = R1;
00008DFA 19 D3 2E 03 [R_WriteIndex] = R1;
00008DFC 90 9A retf;
///////////////////////////////////////////
// Function: Get a data form Queue
// Output: R1: Data
// R2: return value
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue:
00008DFD 12 95 2D 03 R2 = [R_ReadIndex];
00008DFF 12 45 2E 03 cmp R2,[R_WriteIndex];
00008E01 0C 5E je L_RQ_QueueEmpty;
00008E02 0A 05 FB 02 R2 += R_Queue; // get queue data address
00008E04 C2 92 R1 = [R2];
00008E05 12 95 2D 03 R2 = [R_ReadIndex];
00008E07 41 04 R2 += 1;
00008E08 72 44 cmp R2, C_QueueSize;
00008E09 01 4E jne L_RQ_NotQueueBottom;
00008E0A 40 94 R2 = 0;
L_RQ_NotQueueBottom:
00008E0B 1A D5 2D 03 [R_ReadIndex] = R2;
//r2 = 0x0000; // get queue data
00008E0D 90 9A retf;
L_RQ_QueueEmpty:
//r2 = 0x8000; // queue empty
00008E0E 90 9A retf;
///////////////////////////////////////////
// Function: Put a data to Queue
// R1: Input
// Destory: R1,R2,R3
///////////////////////////////////////////
F_SP_WriteQueue:
00008E0F 12 95 2E 03 R2 = [R_WriteIndex]; // put data to queue
00008E11 0A 05 FB 02 R2 += R_Queue;
00008E13 C2 D2 [R2] = R1;
00008E14 12 95 2E 03 R2 = [R_WriteIndex];
00008E16 41 04 R2 += 1;
00008E17 72 44 cmp R2, C_QueueSize;
00008E18 01 4E jne L_WQ_NotQueueBottom;
00008E19 40 94 R2 = 0;
L_WQ_NotQueueBottom:
00008E1A 1A D5 2E 03 [R_WriteIndex] = R2;
00008E1C 90 9A retf;
//..........................................
F_SP_TestQueue:
//... Test Queue Empty ...
00008E1D 11 93 2D 03 R1 = [R_ReadIndex];
00008E1F 11 43 2E 03 cmp R1,[R_WriteIndex];
00008E21 11 5E je L_TQ_QueueEmpty;
//... Test Queue Full ...
00008E22 11 93 2D 03 R1 = [R_ReadIndex]; // For N Queue Full: 1. W=R-1 2.R=0/W=N-1
00008E24 04 4E jnz L_TQ_JudgeCond2;
00008E25 11 93 2E 03 R1 = [R_WriteIndex];
00008E27 71 42 cmp R1, C_QueueSize-1; // Cond1
00008E28 08 5E je L_TQ_QueueFull;
L_TQ_JudgeCond2:
00008E29 11 93 2D 03 R1 = [R_ReadIndex];
00008E2B 41 22 R1 -=1;
00008E2C 11 43 2E 03 cmp R1,[R_WriteIndex];
00008E2E 02 5E je L_TQ_QueueFull;
00008E2F 40 92 r1 = 0; // not Full, not empty
00008E30 90 9A retf;
L_TQ_QueueFull:
00008E31 41 92 r1 = 1; // full
00008E32 90 9A retf;
L_TQ_QueueEmpty:
00008E33 42 92 r1 = 2; // empty
00008E34 90 9A retf;
//.........................................
//////////////////////////////////////////////////////
// SACM_GetResource(Address,Page,offset);
//////////////////////////////////////////////////////
_SP_GetResource: .PROC
00008E35 88 DA push bp to [sp];
00008E36 08 0B 01 00 bp = sp + 1;
//push r2 to [sp];
00008E38 03 92 r1 = [bp+3]; // address
00008E39 04 94 r2 = [bp+4]; // bank
00008E3A 5A 95 r2 = r2 lsl 4;
00008E3B 5A 95 r2 = r2 lsl 4;
00008E3C 4A 95 r2 = r2 lsl 2;
00008E3D 7F BC sr &= 0x03f;
00008E3E 06 A5 r2 |=sr;
00008E3F 02 9D sr = r2;
00008E40 E1 92 r1 = D:[r1];
//pop r2 from [sp];
00008E41 88 98 pop bp from [sp];
00008E42 90 9A retf;
.ENDP
_SP_Delay: .PROC
F_SP_Delay:
00008E43 90 9A retf;
.ENDP
//========================================================================================
// End of hardware.asm
//========================================================================================
0 error(s), 0 warning(s).
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