📄 counter.lst
字号:
__start:
__text_start:
001D EDCF LDI R28,0xDF
001E E0D0 LDI R29,0
001F BFCD OUT 0x3D,R28
0020 BFDE OUT 0x3E,R29
0021 51C0 SUBI R28,0x10
0022 40D0 SBCI R29,0
0023 EA0A LDI R16,0xAA
0024 8308 STD Y+0,R16
0025 2400 CLR R0
0026 E7E4 LDI R30,0x74
0027 E0F0 LDI R31,0
0028 E010 LDI R17,0
0029 37E4 CPI R30,0x74
002A 07F1 CPC R31,R17
002B F011 BEQ 0x002E
002C 9201 ST R0,Z+
002D CFFB RJMP 0x0029
002E 8300 STD Z+0,R16
002F E2E6 LDI R30,0x26
0030 E0F0 LDI R31,0
0031 E6A0 LDI R26,0x60
0032 E0B0 LDI R27,0
0033 E010 LDI R17,0
0034 33EA CPI R30,0x3A
0035 07F1 CPC R31,R17
0036 F021 BEQ 0x003B
0037 95C8 LPM
0038 9631 ADIW R30,1
0039 920D ST R0,X+
003A CFF9 RJMP 0x0034
003B D0FB RCALL _main
_exit:
003C CFFF RJMP _exit
_timer0_ovf_isr:
a --> R22
b --> R20
003D 922A ST R2,-Y
003E 923A ST R3,-Y
003F 924A ST R4,-Y
0040 925A ST R5,-Y
0041 930A ST R16,-Y
0042 931A ST R17,-Y
0043 932A ST R18,-Y
0044 933A ST R19,-Y
0045 938A ST R24,-Y
0046 939A ST R25,-Y
0047 93AA ST R26,-Y
0048 93BA ST R27,-Y
0049 93EA ST R30,-Y
004A 93FA ST R31,-Y
004B B62F IN R2,0x3F
004C 922A ST R2,-Y
004D D1FF RCALL push_gset2
FILE: D:\频率计\counter.c
(0001)
(0002)
(0003) /*
(0004) Jesper Hansen <jesperh@telia.com>
(0005)
(0006) This program is free software; you can redistribute it and/or
(0007) modify it under the terms of the GNU General Public License
(0008) as published by the Free Software Foundation; either version 2
(0009) of the License, or (at your option) any later version.
(0010)
(0011) This program is distributed in the hope that it will be useful,
(0012) but WITHOUT ANY WARRANTY; without even the implied warranty of
(0013) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
(0014) GNU General Public License for more details.
(0015)
(0016) You should have received a copy of the GNU General Public License
(0017) along with this program; if not, write to the Free Software Foundation,
(0018) Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
(0019)
(0020)
(0021)
(0022) Project: CounterMeasures
(0023)
(0024)
(0025) 40 MHz Frequency Counter
(0026) ------------------------
(0027)
(0028) CPU : At90S2313
(0029)
(0030) Date: 2001-03-02
(0031)
(0032) Author : Jesper Hansen
(0033)
(0034)
(0035)
(0036)
(0037)
(0038) Current consumption about 40-45 mA.
(0039)
(0040) Measures to > 50 MHz
(0041)
(0042)
(0043) */
(0044)
(0045)
(0046) #include <io2313v.h>
(0047) #include <macros.h>
(0048) #include "counter.h"
(0049)
(0050)
(0051) // PORT D bits
(0052)
(0053) // al counter control bits active low
(0054)
(0055) #define CLEAR PD6
(0056) #define OE_H PD5
(0057) #define OE_L PD4
(0058)
(0059) // PD3..0 is lower data bus
(0060)
(0061)
(0062) // PORT B
(0063)
(0064) // PB7..4 is high data bus
(0065) // PB3 is OC1 output
(0066) // PB2..0 is 74HC138 select bits for display common
(0067)
(0068)
(0069)
(0070) // constants/macros
(0071) #define F_CPU 4000000 // 4MHz processor
(0072) #define CYCLES_PER_US ((F_CPU+500000)/1000000) // cpu cycles per microsecond
(0073)
(0074)
(0075) // display data
(0076)
(0077) #define SEG_a 0x01
(0078) #define SEG_b 0x02
(0079) #define SEG_c 0x04
(0080) #define SEG_d 0x08
(0081) #define SEG_e 0x10
(0082) #define SEG_f 0x20
(0083) #define SEG_g 0x40
(0084) #define SEG_dot 0x80
(0085)
(0086)
(0087) unsigned char digits[] = {
(0088) (SEG_a|SEG_b|SEG_c|SEG_d|SEG_e|SEG_f), // 0
(0089) (SEG_b|SEG_c), // 1
(0090) (SEG_a|SEG_b|SEG_d|SEG_e|SEG_g), // 2
(0091) (SEG_a|SEG_b|SEG_c|SEG_d|SEG_g), // 3
(0092) (SEG_b|SEG_c|SEG_c|SEG_f|SEG_g), // 4
(0093) (SEG_a|SEG_c|SEG_d|SEG_f|SEG_g), // 5
(0094) (SEG_a|SEG_c|SEG_d|SEG_e|SEG_f|SEG_g), // 6
(0095) (SEG_a|SEG_b|SEG_c), // 7
(0096) (SEG_a|SEG_b|SEG_c|SEG_d|SEG_e|SEG_f|SEG_g), // 8
(0097) (SEG_a|SEG_b|SEG_c|SEG_d|SEG_f|SEG_g), // 9
(0098)
(0099) (SEG_a), // mode 0 indicator (Hz)
(0100) (SEG_g), // mode 1 indicator (kHz)
(0101) (SEG_d), // mode 2 indicator (MHz)
(0102) };
(0103)
(0104)
(0105) /****************************************************************************/
(0106)
(0107)
(0108) // timer 0 interrupt handles multiplex and refresh of the displays
(0109) // timer is clocked at 62500 Hz
(0110)
(0111) #define TI0_L (256-125) // 500 Hz -> 2 mS
(0112)
(0113) volatile unsigned char active_led = 0;
(0114)
(0115) volatile unsigned long led_value = 0; // four BCD nibbles
(0116) volatile unsigned char decimal_point = 0;
(0117) volatile unsigned char mode_setting = 0;
(0118)
(0119)
(0120) #pragma interrupt_handler timer0_ovf_isr:7
(0121) void timer0_ovf_isr(void) //timer 0 overflow
(0122) {
(0123) unsigned char a,b;
(0124)
(0125) // reload timer
(0126) outp(TI0_L, TCNT0);
004E E883 LDI R24,0x83
004F BF82 OUT 0x32,R24
(0127)
(0128) // all displays off by setting all commons high
(0129) outp(inp(PORTB) | 0x07, PORTB);
0050 B388 IN R24,0x18
0051 6087 ORI R24,7
0052 BB88 OUT 0x18,R24
(0130)
(0131) if (active_led == 5)
0053 9180006D LDS R24,0x6D
0055 3085 CPI R24,5
0056 F449 BNE 0x0060
(0132) {
(0133) b = digits[10 + mode_setting];
0057 E68A LDI R24,0x6A
0058 E090 LDI R25,0
0059 91E00073 LDS R30,0x73
005B 27FF CLR R31
005C 0FE8 ADD R30,R24
005D 1FF9 ADC R31,R25
005E 8140 LDD R20,Z+0
(0134) }
005F C02C RJMP 0x008C
(0135) else
(0136) {
(0137) a = led_value >> (( 4 - active_led ) * 4);
0060 9020006D LDS R2,0x6D
0062 2433 CLR R3
0063 E084 LDI R24,4
0064 E090 LDI R25,0
0065 1982 SUB R24,R2
0066 0993 SBC R25,R3
0067 0F88 LSL R24
0068 1F99 ROL R25
0069 0F88 LSL R24
006A 1F99 ROL R25
006B 90400070 LDS R4,0x70
006D 90500071 LDS R5,0x71
006F 9020006E LDS R2,0x6E
0071 9030006F LDS R3,0x6F
0073 938A ST R24,-Y
0074 2D02 MOV R16,R2
0075 2D13 MOV R17,R3
0076 2D24 MOV R18,R4
0077 2D35 MOV R19,R5
0078 D1E3 RCALL lsr32
0079 2F60 MOV R22,R16
(0138)
(0139) b = digits[a & 0x0f];
007A E680 LDI R24,0x60
007B E090 LDI R25,0
007C 2FE6 MOV R30,R22
007D 27FF CLR R31
007E 70EF ANDI R30,0xF
007F 70F0 ANDI R31,0
0080 0FE8 ADD R30,R24
0081 1FF9 ADC R31,R25
0082 8140 LDD R20,Z+0
(0140)
(0141) if (decimal_point == (4 - active_led) )
0083 9020006D LDS R2,0x6D
0085 E084 LDI R24,4
0086 1982 SUB R24,R2
0087 90200072 LDS R2,0x72
0089 1628 CP R2,R24
008A F409 BNE 0x008C
(0142) b |= SEG_dot;
008B 6840 ORI R20,0x80
(0143) }
(0144)
(0145) a = b & 0xf0; // hi part
008C 2F64 MOV R22,R20
008D 7F60 ANDI R22,0xF0
(0146) b = b & 0x0f; // lo part
008E 704F ANDI R20,0xF
(0147)
(0148) // set digit data on port
(0149) outp( (inp(PORTB) & 0x0f) | a, PORTB); // high part
008F B388 IN R24,0x18
0090 708F ANDI R24,0xF
0091 2B86 OR R24,R22
0092 BB88 OUT 0x18,R24
(0150) outp( (inp(PORTD) & 0xf0) | b, PORTD); // low part
0093 B382 IN R24,0x12
0094 7F80 ANDI R24,0xF0
0095 2B84 OR R24,R20
0096 BB82 OUT 0x12,R24
(0151)
(0152) // set common
(0153) outp( (inp(PORTB) & 0xf8) | active_led, PORTB);
0097 9020006D LDS R2,0x6D
0099 B388 IN R24,0x18
009A 7F88 ANDI R24,0xF8
009B 2982 OR R24,R2
009C BB88 OUT 0x18,R24
(0154)
(0155) active_led = (active_led+1) % 6;
009D E016 LDI R17,6
009E 9100006D LDS R16,0x6D
00A0 5F0F SUBI R16,0xFF
00A1 D17A RCALL mod8u
00A2 9300006D STS 0x6D,R16
(0156) }
00A4 D18F RCALL pop_gset2
00A5 9029 LD R2,Y+
00A6 BE2F OUT 0x3F,R2
00A7 91F9 LD R31,Y+
00A8 91E9 LD R30,Y+
00A9 91B9 LD R27,Y+
00AA 91A9 LD R26,Y+
00AB 9199 LD R25,Y+
00AC 9189 LD R24,Y+
00AD 9139 LD R19,Y+
00AE 9129 LD R18,Y+
00AF 9119 LD R17,Y+
00B0 9109 LD R16,Y+
00B1 9059 LD R5,Y+
00B2 9049 LD R4,Y+
00B3 9039 LD R3,Y+
00B4 9029 LD R2,Y+
00B5 9518 RETI
_delay:
delay_loops --> R20
i --> R22
us --> R20
00B6 D196 RCALL push_gset2
00B7 2F40 MOV R20,R16
00B8 2F51 MOV R21,R17
(0157)
(0158)
(0159)
(0160)
(0161)
(0162) /****************************************************************************/
(0163) /* helpers ****************************************************************/
(0164) /****************************************************************************/
(0165)
(0166)
(0167) void delay(unsigned short us)
(0168) {
(0169) unsigned short delay_loops;
(0170) register unsigned short i;
(0171)
(0172) delay_loops = (us+3)/5*CYCLES_PER_US; // +3 for rounding up (dirty)
00B9 E025 LDI R18,5
00BA E030 LDI R19,0
00BB 2F04 MOV R16,R20
00BC 2F15 MOV R17,R21
00BD 5F0D SUBI R16,0xFD
00BE 4F1F SBCI R17,0xFF
00BF D142 RCALL div16u
00C0 2E20 MOV R2,R16
00C1 2E31 MOV R3,R17
00C2 2444 CLR R4
00C3 2455 CLR R5
00C4 E082 LDI R24,2
00C5 E090 LDI R25,0
00C6 938A ST R24,-Y
00C7 2D02 MOV R16,R2
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