dds.edn

多功能函数发生器

    (cell NOR3 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
           (port C (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell NAND3 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
           (port C (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell AND3FTT (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
           (port C (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell AND3 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
           (port C (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell OR2 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell NOR2FT (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell NOR2 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell NAND2 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell AND2 (cellType GENERIC)
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT))
           (port A (direction INPUT)
           (property load (integer 1))
 )
           (port B (direction INPUT)
           (property load (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
  )
  (library work
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell data_sin (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename q5 "q5(7:0)") 8) (direction OUTPUT))
           (port (array (rename q1 "q1(15:8)") 8) (direction INPUT))
           (port clk_c (direction INPUT))
         )
         (contents
          (instance altsyncram_component (viewRef syn_black_box (cellRef altsyncram_work_dds_behav_1 (libraryRef altera_mf)))
           (property lpm_type (string "altsyncram"))
           (property lpm_hint (string "ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=ROM1"))
           (property init_file (string "./data_rom/data_sin.mif"))
           (property width_byteena_a (integer 1))
           (property outdata_aclr_a (string "NONE"))
           (property address_aclr_a (string "NONE"))
           (property outdata_reg_a (string "UNREGISTERED"))
           (property operation_mode (string "ROM"))
           (property numwords_a (integer 256))
           (property widthad_a (integer 8))
           (property width_a (integer 8))
           (property intended_device_family (string "Cyclone"))
          )
          (instance PWR_i (viewRef prim (cellRef PWR (libraryRef A500K)))          )
          (instance GND_i (viewRef prim (cellRef GND (libraryRef A500K)))          )
          (net clk_c (joined
           (portRef clk_c)
           (portRef clock0 (instanceRef altsyncram_component))
          ))
          (net (rename q1_8 "q1[8]") (joined
           (portRef (member q1 7))
           (portRef (member address_a 7) (instanceRef altsyncram_component))
          ))
          (net (rename q1_9 "q1[9]") (joined
           (portRef (member q1 6))
           (portRef (member address_a 6) (instanceRef altsyncram_component))
          ))
          (net (rename q1_10 "q1[10]") (joined
           (portRef (member q1 5))
           (portRef (member address_a 5) (instanceRef altsyncram_component))
          ))
          (net (rename q1_11 "q1[11]") (joined
           (portRef (member q1 4))
           (portRef (member address_a 4) (instanceRef altsyncram_component))
          ))
          (net (rename q1_12 "q1[12]") (joined
           (portRef (member q1 3))
           (portRef (member address_a 3) (instanceRef altsyncram_component))
          ))
          (net (rename q1_13 "q1[13]") (joined
           (portRef (member q1 2))
           (portRef (member address_a 2) (instanceRef altsyncram_component))
          ))
          (net (rename q1_14 "q1[14]") (joined
           (portRef (member q1 1))
           (portRef (member address_a 1) (instanceRef altsyncram_component))
          ))
          (net (rename q1_15 "q1[15]") (joined
           (portRef (member q1 0))
           (portRef (member address_a 0) (instanceRef altsyncram_component))
          ))
          (net (rename q5_0 "q5[0]") (joined
           (portRef (member q_a 7) (instanceRef altsyncram_component))
           (portRef (member q5 7))
          ))
          (net (rename q5_1 "q5[1]") (joined
           (portRef (member q_a 6) (instanceRef altsyncram_component))
           (portRef (member q5 6))
          ))
          (net (rename q5_2 "q5[2]") (joined
           (portRef (member q_a 5) (instanceRef altsyncram_component))
           (portRef (member q5 5))
          ))
          (net (rename q5_3 "q5[3]") (joined
           (portRef (member q_a 4) (instanceRef altsyncram_component))
           (portRef (member q5 4))
          ))
          (net (rename q5_4 "q5[4]") (joined
           (portRef (member q_a 3) (instanceRef altsyncram_component))
           (portRef (member q5 3))
          ))
          (net (rename q5_5 "q5[5]") (joined
           (portRef (member q_a 2) (instanceRef altsyncram_component))
           (portRef (member q5 2))
          ))
          (net (rename q5_6 "q5[6]") (joined
           (portRef (member q_a 1) (instanceRef altsyncram_component))
           (portRef (member q5 1))
          ))
          (net (rename q5_7 "q5[7]") (joined
           (portRef (member q_a 0) (instanceRef altsyncram_component))
           (portRef (member q5 0))
          ))
          (net GND (joined
           (portRef Y (instanceRef GND_i))
          ))
          (net VCC (joined
           (portRef Y (instanceRef PWR_i))
          ))
         )
       )
    )
    (cell data_juchi (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename q4 "q4(7:0)") 8) (direction OUTPUT))
           (port (array (rename q1 "q1(15:8)") 8) (direction INPUT))
           (port clk_c (direction INPUT))
         )
         (contents
          (instance altsyncram_component (viewRef syn_black_box (cellRef altsyncram_work_dds_behav_3 (libraryRef altera_mf)))
           (property lpm_type (string "altsyncram"))
           (property lpm_hint (string "ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=ROM4"))
           (property init_file (string "./data_rom/data_juchi.mif"))
           (property width_byteena_a (integer 1))
           (property outdata_aclr_a (string "NONE"))
           (property address_aclr_a (string "NONE"))
           (property outdata_reg_a (string "UNREGISTERED"))
           (property operation_mode (string "ROM"))
           (property numwords_a (integer 256))
           (property widthad_a (integer 8))
           (property width_a (integer 8))
           (property intended_device_family (string "Cyclone"))
          )
          (instance PWR_i (viewRef prim (cellRef PWR (libraryRef A500K)))          )
          (instance GND_i (viewRef prim (cellRef GND (libraryRef A500K)))          )
          (net clk_c (joined
           (portRef clk_c)
           (portRef clock0 (instanceRef altsyncram_component))
          ))
          (net (rename q1_8 "q1[8]") (joined
           (portRef (member q1 7))
           (portRef (member address_a 7) (instanceRef altsyncram_component))
          ))
          (net (rename q1_9 "q1[9]") (joined
           (portRef (member q1 6))
           (portRef (member address_a 6) (instanceRef altsyncram_component))
          ))
          (net (rename q1_10 "q1[10]") (joined
           (portRef (member q1 5))
           (portRef (member address_a 5) (instanceRef altsyncram_component))
          ))
          (net (rename q1_11 "q1[11]") (joined
           (portRef (member q1 4))
           (portRef (member address_a 4) (instanceRef altsyncram_component))
          ))
          (net (rename q1_12 "q1[12]") (joined
           (portRef (member q1 3))