📄 dual_extendtable.c
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//V010 Modify Start 20080824
// V010 Patch Note (3) : Update LVR setting for LR/RD series
#if((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))
4, _NON_AUTOINC, _P0_POWER_ON_RESET_F3, 0x40, // 0x40 for LR/RD series
#else
4, _NON_AUTOINC, _P0_POWER_ON_RESET_F3, 0xc0,
#endif
//V010 Modify End 20080824
4, _NON_AUTOINC, _P0_HS_SCHMITT_TRIGGER_CTRL_F4, 0xe9,
#if(_SCALER_TYPE == _RTD2545LR)
4, _AUTOINC, _P0_ADC_CLAMP_CTRL2_D6, 0x88,//sephinroth 1121
#else
4, _AUTOINC, _P0_ADC_CLAMP_CTRL2_D6, 0x58,
#endif
#if((_BJT_SUPPORT != _ON) && (_SCALER_TYPE == _RTD2545LR))//cyyeh 20080509
4, _NON_AUTOINC, _P0_EBD_REGLATOR_VOL_DF, 0x02,
#endif
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE1,
7, _AUTOINC, _P1_PLL_DIV_CTRL_A0, 0x04,0x47,0x00,0x18,
4, _NON_AUTOINC, _P1_PLL_PHASE_INTERPOLATION_B5, 0x50,
4, _NON_AUTOINC, _P1_DDS_MIX_1_B8, 0x0E, //cyyeh 20080222
//Anderson 080125 for New DPLL of 2545LR, 247xRD, 248xRD Start
#if(_SCALER_TYPE == _RTD2472D)
7, _AUTOINC, _P1_DPLL_OTHER_C3, 0x16,0x10,0x00,0x04,
4, _NON_AUTOINC, _P1_MULTIPLY_PLL_CTRL3_E5, 0x09,
4, _NON_AUTOINC, _P1_MULTIPLY_PLL_CTRL0_E0, 0x10,
#else
6, _AUTOINC, _P1_DCLK_FINE_TUNE_OFFSET_MSB_C4,0x10,0x00,0x04,//cyyeh 20080417
4, _NON_AUTOINC, _P1_M2PLL_WD_E5, 0x18,//Anderson 080125 Need to Confirm
4, _NON_AUTOINC, _P1_M2PLL_M_E0, 0x69,
#endif
#if(_AUDIO_SUPPORT == _ON) //yc 20080428
4, _NON_AUTOINC, _V8_YUV_CONVERSION_1F, 0x10, //for audio pin share
9, _AUTOINC, _P1_BB_POWER0_F0, 0xff,0xff,0x27, 0x27,0x30,0xc0, //cyyeh 20080306
#else
4, _NON_AUTOINC, _V8_YUV_CONVERSION_1F, 0x00, //for audio pin share
9, _AUTOINC, _P1_BB_POWER0_F0, 0x00,0x00,0x27, 0x27,0xff,0xc0, //1126 sephinroth
#endif
//Anderson 080125 for New DPLL of 2545LR, 247xRD, 248xRD End
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE2,
4, _NON_AUTOINC, _P2_UP_DOWN_CTRL0_B5, 0x58,
//cyyeh 20080214
4, _NON_AUTOINC, _P2_TMDS_DPC1_B8, 0x0C,
4, _NON_AUTOINC, _P2_HDMI_APC_C8, 0x01,//For DVI/HDMI enable
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_BCHCR_02,//cyyeh 20080710 enable BCH function
4, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x0e,
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AVMCR_30,
#if(_HDMI_SUPPORT == _ON)
7, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x68,0x00,0x84,0x04,//For Audio Output Enable and Mute,cyyeh 20080306
#elif(_TMDS_SUPPORT == _ON)
4, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x08,//Enable Video Output
#endif
#if(_HDMI_SUPPORT == _ON)
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_PVGCR0_45,
5, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x09,0x00,//For HDMI Packet
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_ACRCR_51,
4, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x44,//For HDMI Color space auto switch between 4:2:2/4:4:4
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR0_38,
4, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x00,//Power On Audio PLL
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AFCR_03,
4, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x06,//Enable Audio FIFO
4, _NON_AUTOINC, _P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62,
4, _NON_AUTOINC, _P2_HDMI_DATA_PORT_CA, 0x00,//Disable SPDIF/I2S Output
#endif
4, _NON_AUTOINC, _P2_HDCP_PORT_CTRL_C2, 0x01,
4, _NON_AUTOINC, _DISP_ACCESS_PORT_2A, _DISP_NEW_DV_DLY_23,
4, _NON_AUTOINC, _DISP_DATA_PORT_2B, 0x40,
4, _NON_AUTOINC, _DISP_ACCESS_PORT_2A, _DISP_NEW_DV_CTRL_22,
4, _NON_AUTOINC, _DISP_DATA_PORT_2B, 0xa0,
#if(_SCALER_TYPE == _RTD2472D)
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE6, //cyyeh 20080606
4, _NON_AUTOINC, _P6_SOY_CH0_CFG3_C3, 0x1E, //for SOG0 CTRL 20080324
#endif
#if((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE0,//cyyeh 20080606
4, _NON_AUTOINC, _P0_ADC_SOG_DAC_SOY_CONTROL_D7, 0x1E, //for SOG0 CTRL
#endif
//Anderson 080130 for OD/FRC Support Start
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE4,//SDRAM Setting
//V402 modify
#if(_MEMORY_WORK_TYPE != _OD_OFF_FRC_OFF)
#if(_MEMORY_CONFIG == _1M_16BIT_1PCE)
9, _AUTOINC, _P4_SDR_CTRL0_A1, _SDR_ROW_DELAY,_SDR_COL_DELAY,0x0d,0x83,0x23,0x00,
#elif(_MEMORY_CONFIG == _1M_16BIT_2PCE)
9, _AUTOINC, _P4_SDR_CTRL0_A1, _SDR_ROW_DELAY,_SDR_COL_DELAY,0x0d,0x83,0x63,0x00, //Anderson 080422
#elif(_MEMORY_CONFIG == _2M_32BIT_1PCE)
9, _AUTOINC, _P4_SDR_CTRL0_A1, _SDR_ROW_DELAY,_SDR_COL_DELAY,0x0d,0x83,0x83,0x00,
#elif(_MEMORY_CONFIG == _2M_32BIT_2PCE)
9, _AUTOINC, _P4_SDR_CTRL0_A1, _SDR_ROW_DELAY,_SDR_COL_DELAY,0x0d,0x83,0xc3,0x00,
#endif
#if(_MEMORY_WORK_TYPE == _OD_ON_FRC_OFF)
14, _AUTOINC, _P4_SDR_AREF_CNT_A7, 0xc0,0x00,0x00,0x11,0x22,0x00,0x00,0x00,0x00,0x44,0x88,
#elif(_MEMORY_WORK_TYPE == _OD_OFF_FRC_ON)
14, _AUTOINC, _P4_SDR_AREF_CNT_A7, 0xc0,0x00,0x00,0x11,0x22,0x44,0x00,0x88,0x00,0x00,0x00,
#elif(_MEMORY_WORK_TYPE == _OD_ON_FRC_ON)
14, _AUTOINC, _P4_SDR_AREF_CNT_A7, 0xc0,0x00,0x00,0x11,0x22,0x40,0x00,0x80,0x00,0x04,0x08,
#endif
//Anderson 080304 for SDRAM Enable and SDRAM Size Start
//V009_20080822
#if((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE5,
4, _NON_AUTOINC, _P5_SDRF_IN1_LINE_NUM_H_B7, 0x10,
4, _NON_AUTOINC, _P5_SDRF_MN_LINE_NUM_H_CD, 0x10,
4, _NON_AUTOINC, _P5_SDRF_MN_DISP_CTRL_CF, 0X05,
4, _NON_AUTOINC, _P5_SDRF_MN_SDR_STATUS_D0, 0x10,
#endif
#if(_SCALER_TYPE == _RTD2545LR)
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGEE,
#if(_MEMORY_CONFIG == _1M_16BIT_1PCE)
4, _NON_AUTOINC, _PE_PIN_SHARE_CTRL00_D4, 0x04,
#else
4, _NON_AUTOINC, _PE_PIN_SHARE_CTRL00_D4, 0x06,
#endif
#else
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE10,
#if(_MEMORY_CONFIG == _1M_16BIT_1PCE)
4, _NON_AUTOINC, _P10_PIN_SHARE_CTRL14_B7, 0x04,
#elif(_MEMORY_CONFIG == _1M_16BIT_2PCE)
4, _NON_AUTOINC, _P10_PIN_SHARE_CTRL14_B7, 0x05,
#elif(_MEMORY_CONFIG == _2M_32BIT_1PCE)
4, _NON_AUTOINC, _P10_PIN_SHARE_CTRL14_B7, 0x07,//Anderson 080512 for Spec. Error
#endif
#endif // End of #if(_SCALER_TYPE == _RTD2545LR)
//Anderson 080304 for SDRAM Enable and SDRAM Size End
#endif // End of #if(_MEMORY_CONFIG != _OD_OFF_FRC_OFF)
//Anderson 080130 for OD/FRC Support End
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGEB,
#if((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))
4, _NON_AUTOINC, _PB_DP_CDR_03_A3, 0x8C,
#endif
4, _NON_AUTOINC, _PB_DP_RESERVED_01_BB, 0xc0,
//4, _NON_AUTOINC, _PB_DP_RESERVED_00_BA, 0x80,
4, _NON_AUTOINC, _PAGE_SELECT_9F, _PAGE3,
_END
};
ModeTableType code ExtendModeTable[_MAX_PRESET_MODE] =
{
{ // Mode 0 : 640 x 350 x 70 Hz
_PRESET_TIMING | _SYNC_HP_VN, // Polarity Flags,
640, 400,//350, // InputWidth, InputHeight,
315, 700, // IHFreq in kHz, IVFreq in Hz,
_HFREQ_TOLERANCE, _VFREQ_TOLERANCE, // IHFreqTolerance in kHz, IVFreqTolerance in Hz,
800, 449, // IHTotal, IVTotal,
144, 36,//62, // IHStartPos, IVStartPos,
},
{ // Mode 1 : 640 x 350 x 85 Hz
0 | _SYNC_HP_VN, // Polarity Flags,
640, 350, // InputWidth, InputHeight,
378, 850, // IHFreq in kHz, IVFreq in Hz,
_HFREQ_TOLERANCE + 5, _VFREQ_TOLERANCE + 5, // IHFreqTolerance in kHz, IVFreqTolerance in Hz,
832, 445, // IHTotal, IVTotal,
160, 63, // IHStartPos, IVStartPos,
},
{ // Mode 2 : 720 x 400 x 70 Hz
_PRESET_TIMING | _SYNC_HN_VP | _SYNC_HP_VP | _SYNC_HN_VN, // Polarity Flags,
720, 400, // InputWidth, InputHeight,
315, 700, // IHFreq in kHz, IVFreq in Hz,
_HFREQ_TOLERANCE, _VFREQ_TOLERANCE, // IHFreqTolerance in kHz, IVFreqTolerance in Hz,
900, 449, // IHTotal, IVTotal,
162, 37, // IHStartPos, IVStartPos,
},
{ // Mode 3 : 720 x 400 x 85 Hz
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